{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,9]],"date-time":"2026-07-09T14:20:44Z","timestamp":1783606844457,"version":"3.55.0"},"reference-count":58,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-017"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-012"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-004"}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Microelectronics Journal"],"published-print":{"date-parts":[[2026,9]]},"DOI":"10.1016\/j.mejo.2026.107339","type":"journal-article","created":{"date-parts":[[2026,6,25]],"date-time":"2026-06-25T16:28:50Z","timestamp":1782404930000},"page":"107339","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":0,"special_numbering":"C","title":["3D-MANN: A 3D NAND flash-based reconfigurable architecture for Memory Augmented Neural Networks"],"prefix":"10.1016","volume":"175","author":[{"ORCID":"https:\/\/orcid.org\/0009-0009-4546-6756","authenticated-orcid":false,"given":"Jing","family":"Zhou","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qianqi","family":"Zhao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chuheng","family":"Xu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jiabei","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ye","family":"Tian","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ke","family":"Chen","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qianhui","family":"Li","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qi","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tianchun","family":"Ye","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zongliang","family":"Huo","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"78","reference":[{"key":"10.1016\/j.mejo.2026.107339_b1","doi-asserted-by":"crossref","first-page":"90","DOI":"10.1016\/j.cobeha.2021.01.002","article-title":"Meta-learning in natural and artificial intelligence","volume":"38","author":"Wang","year":"2021","journal-title":"Curr. Opin. Behav. Sci."},{"key":"10.1016\/j.mejo.2026.107339_b2","series-title":"Generalizing from a few examples: a survey on few-shot learning","author":"Wang","year":"2020"},{"key":"10.1016\/j.mejo.2026.107339_b3","series-title":"2021 IEEE 4th International Conference on Automation, Electronics and Electrical Engineering (AUTEEE)","first-page":"144","article-title":"Cell image incremental classification with memory-augmented convolutional neural networks","author":"Jin","year":"2021"},{"key":"10.1016\/j.mejo.2026.107339_b4","doi-asserted-by":"crossref","first-page":"283","DOI":"10.1021\/acscentsci.6b00367","article-title":"Low data drug discovery with one-shot learning","volume":"3","author":"Altae-Tran","year":"2017","journal-title":"ACS Cent. Sci."},{"key":"10.1016\/j.mejo.2026.107339_b5","doi-asserted-by":"crossref","DOI":"10.1371\/journal.pone.0269461","article-title":"Memory augmented recurrent neural networks for de-novo drug design","volume":"17","author":"Suresh","year":"2022","journal-title":"PLOS One"},{"key":"10.1016\/j.mejo.2026.107339_b6","doi-asserted-by":"crossref","first-page":"128","DOI":"10.1016\/j.neucom.2021.09.012","article-title":"Memory augmented convolutional neural network and its application in bioimages","volume":"466","author":"Ding","year":"2021","journal-title":"Neurocomputing"},{"key":"10.1016\/j.mejo.2026.107339_b7","series-title":"Proceedings of the 33rd International Conference on Machine Learning","first-page":"1842","article-title":"Meta-learning with memory-augmented neural networks","author":"Santoro","year":"2016"},{"key":"10.1016\/j.mejo.2026.107339_b8","series-title":"Advances in Computers","first-page":"247","article-title":"Chapter eight - energy-efficient deep learning inference on edge devices","author":"Daghero","year":"2021"},{"key":"10.1016\/j.mejo.2026.107339_b9","series-title":"Proceedings of the Thiry-Fourth Annual ACM Symposium on Theory of Computing","first-page":"380","article-title":"Similarity estimation techniques from rounding algorithms","author":"Charikar","year":"2002"},{"key":"10.1016\/j.mejo.2026.107339_b10","series-title":"Proceedings of the 2010 ACM SIGMOD International Conference on Management of Data","first-page":"375","article-title":"Similarity search and locality sensitive hashing using ternary content addressable memories","author":"Shinde","year":"2010"},{"key":"10.1016\/j.mejo.2026.107339_b11","doi-asserted-by":"crossref","first-page":"521","DOI":"10.1038\/s41928-019-0321-3","article-title":"Ferroelectric ternary content-addressable memory for one-shot learning","volume":"2","author":"Ni","year":"2019","journal-title":"Nat. Electron."},{"key":"10.1016\/j.mejo.2026.107339_b12","doi-asserted-by":"crossref","first-page":"6637","DOI":"10.1109\/TED.2021.3110464","article-title":"SAPIENS: a 64-kb RRAM-based non-volatile associative memory for one-shot learning and inference at the edge","volume":"68","author":"Li","year":"2021","journal-title":"IEEE Trans. Electron Devices"},{"key":"10.1016\/j.mejo.2026.107339_b13","doi-asserted-by":"crossref","first-page":"2468","DOI":"10.1038\/s41467-021-22364-0","article-title":"Robust high-dimensional memory-augmented neural networks","volume":"12","author":"Karunaratne","year":"2021","journal-title":"Nat. Commun."},{"key":"10.1016\/j.mejo.2026.107339_b14","doi-asserted-by":"crossref","DOI":"10.1016\/j.isci.2023.108371","article-title":"Flash-based content addressable memory with L2 distance for memory-augmented neural network","volume":"26","author":"Yang","year":"2023","journal-title":"IScience"},{"key":"10.1016\/j.mejo.2026.107339_b15","doi-asserted-by":"crossref","first-page":"8047","DOI":"10.1038\/s41467-025-63190-y","article-title":"Charge-domain content addressable memory based on ferroelectric capacitive memory for reliable and energy-efficient one-shot learning","volume":"16","author":"Zhou","year":"2025","journal-title":"Nat Commun"},{"key":"10.1016\/j.mejo.2026.107339_b16","doi-asserted-by":"crossref","first-page":"6284","DOI":"10.1038\/s41467-022-33629-7","article-title":"Experimentally validated memristive memory augmented neural network with efficient hashing and similarity search","volume":"13","author":"Mao","year":"2022","journal-title":"Nat Commun"},{"key":"10.1016\/j.mejo.2026.107339_b17","doi-asserted-by":"crossref","first-page":"7140","DOI":"10.1038\/s41467-023-42981-1","article-title":"Monolithic three-dimensional integration of RRAM-based hybrid memory architecture for one-shot learning","volume":"14","author":"Li","year":"2023","journal-title":"Nat. Commun."},{"key":"10.1016\/j.mejo.2026.107339_b18","series-title":"2021 IEEE International Electron Devices Meeting","first-page":"1","article-title":"Lifelong learning with monolithic 3D ferroelectric ternary content-addressable memory","author":"Dutta","year":"2021"},{"issue":"12","key":"10.1016\/j.mejo.2026.107339_b19","doi-asserted-by":"crossref","first-page":"2636","DOI":"10.1109\/TVLSI.2020.3028848","article-title":"Reconfigurable 2T2R ReRAM architecture for versatile data storage and computing in-memory","volume":"28","author":"Chen","year":"2020","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"10.1016\/j.mejo.2026.107339_b20","doi-asserted-by":"crossref","first-page":"211","DOI":"10.1109\/OJCAS.2020.3042550","article-title":"A reconfigurable 4T2R ReRAM computing in-memory macro for efficient edge applications","volume":"2","author":"Chen","year":"2021","journal-title":"IEEE Open J. Circuits Syst."},{"issue":"4","key":"10.1016\/j.mejo.2026.107339_b21","doi-asserted-by":"crossref","first-page":"1065","DOI":"10.1109\/TVLSI.2025.3526973","article-title":"Reconfigurable 10T SRAM for energy-efficient CAM operation and in-memory computing","volume":"33","author":"Zhang","year":"2025","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"10.1016\/j.mejo.2026.107339_b22","series-title":"Reconfigurable in-memory computing using standard 6T SRAM for BCAM, TCAM, similarity indexing, and logic-in-memory operations","author":"Hassan","year":"2025"},{"key":"10.1016\/j.mejo.2026.107339_b23","doi-asserted-by":"crossref","first-page":"383","DOI":"10.1109\/JEDS.2025.3562399","article-title":"Reliable multistate RRAM devices for reconfigurable CAM and IMC applications","volume":"13","author":"Xing","year":"2025","journal-title":"IEEE J. Electron Devices Soc."},{"key":"10.1016\/j.mejo.2026.107339_b24","doi-asserted-by":"crossref","first-page":"741","DOI":"10.1109\/JEDS.2019.2931769","article-title":"Toward reliable multi-level operation in RRAM arrays: improving post-algorithm stability and assessing endurance\/data retention","volume":"7","author":"P\u00e9rez","year":"2019","journal-title":"IEEE J. Electron Devices Soc."},{"key":"10.1016\/j.mejo.2026.107339_b25","doi-asserted-by":"crossref","first-page":"988","DOI":"10.1109\/TVLSI.2018.2882194","article-title":"Three-dimensional nand flash for vector\u2013matrix multiplication","volume":"27","author":"Wang","year":"2019","journal-title":"IEEE Trans. VLSI Syst."},{"key":"10.1016\/j.mejo.2026.107339_b26","series-title":"2019 IEEE International Electron Devices Meeting","first-page":"38.1.1","article-title":"Optimal design methods to transform 3D NAND flash into a high-density, high-bandwidth and low-power nonvolatile computing in memory (nvCIM) accelerator for deep-learning neural networks (DNN)","author":"Lue","year":"2019"},{"key":"10.1016\/j.mejo.2026.107339_b27","series-title":"2021 58th ACM\/IEEE Design Automation Conference","first-page":"193","article-title":"A compute-in-memory architecture compatible with 3D NAND flash that parallelly activates multi-layers","author":"Zhao","year":"2021"},{"key":"10.1016\/j.mejo.2026.107339_b28","doi-asserted-by":"crossref","first-page":"625","DOI":"10.1109\/JSSC.2021.3098671","article-title":"An embedded nand flash-based compute-in-memory array demonstrated in a standard logic process","volume":"57","author":"Kim","year":"2022","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.mejo.2026.107339_b29","series-title":"2022 IEEE International Solid-State Circuits Conference","first-page":"138","article-title":"A 512gb in-memory-computing 3D-NAND flash supporting similar-vector-matching operations on edge-AI devices","author":"Hu","year":"2022"},{"key":"10.1016\/j.mejo.2026.107339_b30","series-title":"2020 IEEE Silicon Nanoelectronics Workshop","first-page":"29","article-title":"A novel high-density and low-power ternary content addressable memory design based on 3D NAND flash","author":"Yang","year":"2020"},{"key":"10.1016\/j.mejo.2026.107339_b31","series-title":"2020 IEEE International Electron Devices Meeting","first-page":"36.1.1","article-title":"In-memory-searching architecture based on 3D-NAND technology with ultra-high parallelism","author":"Tseng","year":"2020"},{"key":"10.1016\/j.mejo.2026.107339_b32","series-title":"2022 International Electron Devices Meeting","first-page":"33.6.1","article-title":"An analog in-memory-search solution based on 3D-NAND flash memory for brain-inspired computing","author":"Tseng","year":"2022"},{"key":"10.1016\/j.mejo.2026.107339_b33","series-title":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","first-page":"1","article-title":"Chip demonstration of a high-density (43Gb) and high-search-bandwidth (300gb\/s) 3D NAND based in-memory search accelerator for ternary content addressable memory (TCAM) and proximity search of hamming distance","author":"Hsieh","year":"2023"},{"key":"10.1016\/j.mejo.2026.107339_b34","doi-asserted-by":"crossref","first-page":"374","DOI":"10.1109\/LED.2022.3144584","article-title":"Unsupervised learning in winner-takes-all neural network based on 3D NAND flash","volume":"43","author":"Zhou","year":"2022","journal-title":"IEEE Electron Device Lett."},{"key":"10.1016\/j.mejo.2026.107339_b35","series-title":"2015 IEEE 21st International Symposium on High Performance Computer Architecture","first-page":"551","article-title":"Data retention in mlc nand flash memory: characterization, optimization, and recovery","author":"Cai","year":"2015"},{"key":"10.1016\/j.mejo.2026.107339_b36","series-title":"2017 IEEE International Memory Workshop","first-page":"1","article-title":"Data-retention characteristics comparison of 2D and 3D TLC NAND flash memories","author":"Mizoguchi","year":"2017"},{"key":"10.1016\/j.mejo.2026.107339_b37","series-title":"2025 27th International Conference on Digital Signal Processing and Its Applications","first-page":"1","article-title":"Adaptive read threshold optimization for NAND flash memory using micro and macro parameters","author":"Zamaraev","year":"2025"},{"issue":"9","key":"10.1016\/j.mejo.2026.107339_b38","doi-asserted-by":"crossref","first-page":"3069","DOI":"10.1109\/TCOMM.2015.2453413","article-title":"Adaptive read thresholds for NAND flash","volume":"63","author":"Peleato","year":"2015","journal-title":"IEEE Trans. Commun."},{"key":"10.1016\/j.mejo.2026.107339_b39","doi-asserted-by":"crossref","DOI":"10.1016\/j.sysarc.2019.101685","article-title":"Leveraging partial-refresh for performance and lifetime improvement of 3D NAND flash memory in cyber\u2013physical systems","volume":"103","author":"Cui","year":"2020","journal-title":"J. Syst. Archit."},{"key":"10.1016\/j.mejo.2026.107339_b40","series-title":"Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems","first-page":"702","article-title":"Reducing solid-state drive read latency by optimizing read-retry","author":"Park","year":"2021"},{"key":"10.1016\/j.mejo.2026.107339_b41","series-title":"2015 Fifth International Conference on Communication Systems and Network Technologies","first-page":"897","article-title":"Reliability-based ECC system for adaptive protection of NAND flash memories","author":"Yuan","year":"2015"},{"key":"10.1016\/j.mejo.2026.107339_b42","series-title":"2015 31st Symposium on Mass Storage Systems and Technologies","first-page":"1","article-title":"WARM: Improving NAND flash memory lifetime with write-hotness aware retention management","author":"Luo","year":"2015"},{"key":"10.1016\/j.mejo.2026.107339_b43","series-title":"Advances in Neural Information Processing Systems","article-title":"Prototypical networks for few-shot learning","author":"Snell","year":"2017"},{"key":"10.1016\/j.mejo.2026.107339_b44","series-title":"Re-evaluating continual learning scenarios: a categorization and case for strong baselines","author":"Hsu","year":"2019"},{"key":"10.1016\/j.mejo.2026.107339_b45","doi-asserted-by":"crossref","first-page":"1957","DOI":"10.1109\/TVLSI.2019.2905626","article-title":"A novel NAND flash memory architecture for maximally exploiting plane-level parallelism","volume":"27","author":"Kim","year":"2019","journal-title":"IEEE Trans. VLSI Syst."},{"issue":"11","key":"10.1016\/j.mejo.2026.107339_b46","doi-asserted-by":"crossref","first-page":"1149","DOI":"10.1109\/4.475701","article-title":"A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme","volume":"30","author":"Suh","year":"1995","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"6","key":"10.1016\/j.mejo.2026.107339_b47","doi-asserted-by":"crossref","first-page":"494","DOI":"10.1021\/ed061p494","article-title":"The development of the arrhenius equation","volume":"61","author":"Laidler","year":"1984","journal-title":"J. Chem. Educ."},{"key":"10.1016\/j.mejo.2026.107339_b48","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3224432","article-title":"Improving 3D NAND flash memory lifetime by tolerating early retention loss and process variation","volume":"2","author":"Luo","year":"2018","journal-title":"Proc. ACM Meas. Anal. Comput. Syst."},{"key":"10.1016\/j.mejo.2026.107339_b49","series-title":"Training and inference with integers in deep neural networks","author":"Wu","year":"2018"},{"key":"10.1016\/j.mejo.2026.107339_b50","series-title":"YMTC 64L 3D NAND product teardown report, techinsights","year":"2020"},{"key":"10.1016\/j.mejo.2026.107339_b51","doi-asserted-by":"crossref","DOI":"10.3389\/frai.2021.659060","article-title":"NeuroSim simulator for compute-in-memory hardware accelerator: validation and benchmark","volume":"4","author":"Lu","year":"2021","journal-title":"Front. Artif. Intell."},{"key":"10.1016\/j.mejo.2026.107339_b52","doi-asserted-by":"crossref","first-page":"2816","DOI":"10.1109\/TED.2006.884077","article-title":"New generation of predictive technology model for sub-45 nm early design exploration","volume":"53","author":"Zhao","year":"2006","journal-title":"IEEE Trans. Electron Devices"},{"key":"10.1016\/j.mejo.2026.107339_b53","doi-asserted-by":"crossref","first-page":"1037","DOI":"10.1109\/JSSC.2022.3232601","article-title":"A charge domain SRAM compute-in-memory macro with C-2C ladder-based 8-bit MAC unit in 22-nm finfet process for edge inference","volume":"58","author":"Wang","year":"2023","journal-title":"IEEE J Solid-State Circuits"},{"key":"10.1016\/j.mejo.2026.107339_b54","series-title":"A white paper on neural network quantization","author":"Nagel","year":"2021"},{"key":"10.1016\/j.mejo.2026.107339_b55","doi-asserted-by":"crossref","first-page":"124","DOI":"10.1016\/j.future.2022.02.005","article-title":"Quantune: post-training quantization of convolutional neural networks using extreme gradient boosting for fast deployment","volume":"132","author":"Lee","year":"2022","journal-title":"Future Gener. Comput. Syst."},{"key":"10.1016\/j.mejo.2026.107339_b56","series-title":"A data-free analytical quantization scheme for deep learning models","author":"Luqman","year":"2025"},{"issue":"7","key":"10.1016\/j.mejo.2026.107339_b57","doi-asserted-by":"crossref","first-page":"3980","DOI":"10.3390\/app15073980","article-title":"ClipQ: clipping optimization for the post-training quantization of convolutional neural network","volume":"15","author":"Chen","year":"2025","journal-title":"Appl. Sci."},{"key":"10.1016\/j.mejo.2026.107339_b58","series-title":"2019 Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing \u2013 NeurIPS Edition (EMC2-NIPS)","first-page":"52","article-title":"Bit efficient quantization for deep neural networks","author":"Nayak","year":"2019"}],"container-title":["Microelectronics Journal"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S187923912600295X?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S187923912600295X?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2026,7,9]],"date-time":"2026-07-09T13:43:44Z","timestamp":1783604624000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S187923912600295X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,9]]},"references-count":58,"alternative-id":["S187923912600295X"],"URL":"https:\/\/doi.org\/10.1016\/j.mejo.2026.107339","relation":{},"ISSN":["1879-2391"],"issn-type":[{"value":"1879-2391","type":"print"}],"subject":[],"published":{"date-parts":[[2026,9]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"3D-MANN: A 3D NAND flash-based reconfigurable architecture for Memory Augmented Neural Networks","name":"articletitle","label":"Article Title"},{"value":"Microelectronics Journal","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.mejo.2026.107339","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2026 Elsevier Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies.","name":"copyright","label":"Copyright"}],"article-number":"107339"}}