{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,9]],"date-time":"2026-07-09T14:16:01Z","timestamp":1783606561058,"version":"3.55.0"},"reference-count":26,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/legal\/tdmrep-license"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-017"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-012"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-004"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["U23A20350"],"award-info":[{"award-number":["U23A20350"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Integration"],"published-print":{"date-parts":[[2026,9]]},"DOI":"10.1016\/j.vlsi.2026.102782","type":"journal-article","created":{"date-parts":[[2026,6,4]],"date-time":"2026-06-04T06:47:15Z","timestamp":1780555635000},"page":"102782","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":0,"special_numbering":"C","title":["Trust-aware LLM-assisted Bayesian optimization for efficient design space exploration"],"prefix":"10.1016","volume":"110","author":[{"ORCID":"https:\/\/orcid.org\/0009-0008-1443-2767","authenticated-orcid":false,"given":"Shuai","family":"Zhou","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Guantao","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Gangwei","family":"Gu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nianxiong","family":"Tan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"78","reference":[{"issue":"1","key":"10.1016\/j.vlsi.2026.102782_b1","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3630013","article-title":"BOOM-explorer: RISC-v BOOM microarchitecture design space exploration","volume":"29","author":"Bai","year":"2024","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"issue":"1","key":"10.1016\/j.vlsi.2026.102782_b2","doi-asserted-by":"crossref","first-page":"148","DOI":"10.1109\/JPROC.2015.2494218","article-title":"Taking the human out of the loop: A review of Bayesian optimization","volume":"104","author":"Shahriari","year":"2016","journal-title":"Proc. IEEE"},{"key":"10.1016\/j.vlsi.2026.102782_b3","series-title":"Proceedings of the 61st ACM\/IEEE Design Automation Conference","first-page":"1","article-title":"Knowing the spec to explore the design via transformed Bayesian optimization","author":"Luo","year":"2024"},{"key":"10.1016\/j.vlsi.2026.102782_b4","series-title":"2023 60th ACM\/IEEE Design Automation Conference","first-page":"1","article-title":"Graph representation learning for microarchitecture design space exploration","author":"Yi","year":"2023"},{"key":"10.1016\/j.vlsi.2026.102782_b5","series-title":"2025 62nd ACM\/IEEE Design Automation Conference","first-page":"1","article-title":"From flatland to forest: Exploring Pareto-optimal design through RTL hierarchy trees","author":"Luo","year":"2025"},{"key":"10.1016\/j.vlsi.2026.102782_b6","series-title":"2025 62nd ACM\/IEEE Design Automation Conference","first-page":"1","article-title":"Swift or exact? Boosting efficient microarchitecture DSE via multi-fidelity partial order prediction","author":"Liu","year":"2025"},{"key":"10.1016\/j.vlsi.2026.102782_b7","series-title":"2025 IEEE\/ACM International Conference on Computer Aided Design","first-page":"1","article-title":"LLM-augmented multi-modal fusion for soc design space exploration","author":"Luo","year":"2025"},{"key":"10.1016\/j.vlsi.2026.102782_b8","series-title":"Large language models to enhance Bayesian optimization","author":"Liu","year":"2024"},{"issue":"2","key":"10.1016\/j.vlsi.2026.102782_b9","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3774888","article-title":"ChatArch: A knowledge-driven graph-of-thought LLM framework for processor architecture optimization","volume":"31","author":"Wu","year":"2026","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"10.1016\/j.vlsi.2026.102782_b10","series-title":"2025 62nd ACM\/IEEE Design Automation Conference","first-page":"1","article-title":"LEMOE: LLM-enhanced multi-objective Bayesian optimization for microarchitecture exploration","author":"Li","year":"2025"},{"key":"10.1016\/j.vlsi.2026.102782_b11","series-title":"LLINBO: Trustworthy LLM-in-the-loop Bayesian optimization","author":"Chang","year":"2025"},{"key":"10.1016\/j.vlsi.2026.102782_b12","series-title":"Ch. AutoPilot: A Platform-Based ESL Synthesis System","first-page":"99","article-title":"High-level synthesis: From algorithm to digital circuit","author":"Zhang","year":"2008"},{"key":"10.1016\/j.vlsi.2026.102782_b13","series-title":"DAC Design Automation Conference 2012","first-page":"1212","article-title":"Chisel: Constructing hardware in a scala embedded language","author":"Bachrach","year":"2012"},{"key":"10.1016\/j.vlsi.2026.102782_b14","series-title":"Proceedings of the 49th Annual Design Automation Conference","first-page":"623","article-title":"Avoiding game over: bringing design to the next level","author":"Shacham","year":"2012"},{"key":"10.1016\/j.vlsi.2026.102782_b15","unstructured":"K. Asanovi\u0107, R. Avizienis, J. Bachrach, S. Beamer, D. Biancolin, C. Celio, H. Cook, D. Dabbelt, J. Hauser, A. Izraelevitz, S. Karandikar, B. Keller, D. Kim, J. Koenig, Y. Lee, E. Love, M. Maas, A. Magyar, H. Mao, M. Moreto, A. Ou, D.A. Patterson, B. Richards, C. Schmidt, S. Twigg, H. Vo, A. Waterman, The Rocket Chip Generator, Technical Report UCB\/EECS-2016-17, 2016, URL: http:\/\/www2.eecs.berkeley.edu\/Pubs\/TechRpts\/2016\/EECS-2016-17.html."},{"key":"10.1016\/j.vlsi.2026.102782_b16","unstructured":"C. Celio, D.A. Patterson, K. Asanovi\u0107, The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor, Technical Report UCB\/EECS-2015-167, 2015, URL: http:\/\/www2.eecs.berkeley.edu\/Pubs\/TechRpts\/2015\/EECS-2015-167.html."},{"issue":"4","key":"10.1016\/j.vlsi.2026.102782_b17","doi-asserted-by":"crossref","first-page":"10","DOI":"10.1109\/MM.2020.2996616","article-title":"Chipyard: Integrated design, simulation, and implementation framework for custom SoCs","volume":"40","author":"Amid","year":"2020","journal-title":"IEEE Micro"},{"key":"10.1016\/j.vlsi.2026.102782_b18","series-title":"2018 IEEE Asian Solid-State Circuits Conference","first-page":"285","article-title":"A generated multirate signal analysis RISC-V SoC in 16nm FinFET","author":"Bailey","year":"2018"},{"issue":"10","key":"10.1016\/j.vlsi.2026.102782_b19","doi-asserted-by":"crossref","first-page":"2786","DOI":"10.1109\/JSSC.2019.2924090","article-title":"A mixed-signal RISC-V signal analysis SoC generator with a 16-nm FinFET instance","volume":"54","author":"Bailey","year":"2019","journal-title":"IEEE J. Solid-State Circuits"},{"key":"10.1016\/j.vlsi.2026.102782_b20","series-title":"2025 IEEE 68th International Midwest Symposium on Circuits and Systems","first-page":"966","article-title":"A design generator of parameterizable and runtime reconfigurable OFDM processors","author":"Zhou","year":"2025"},{"key":"10.1016\/j.vlsi.2026.102782_b21","series-title":"2021 Design, Automation & Test in Europe Conference & Exhibition","first-page":"1542","article-title":"Leveraging Bayesian optimization to speed up automatic precision tuning","author":"Ha","year":"2021"},{"key":"10.1016\/j.vlsi.2026.102782_b22","series-title":"2023 Design, Automation & Test in Europe Conference & Exhibition","first-page":"1","article-title":"Maximizing computing accuracy on resource-constrained architectures","author":"Ha","year":"2023"},{"issue":"2","key":"10.1016\/j.vlsi.2026.102782_b23","doi-asserted-by":"crossref","first-page":"691","DOI":"10.1109\/TCAD.2025.3590661","article-title":"Attention-based EDA tool parameter explorer: From hybrid parameters to multi-QoR metrics","volume":"45","author":"Luo","year":"2026","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"10.1016\/j.vlsi.2026.102782_b24","series-title":"Additive Gaussian processes","author":"Duvenaud","year":"2011"},{"key":"10.1016\/j.vlsi.2026.102782_b25","series-title":"2021 58th ACM\/IEEE Design Automation Conference","first-page":"769","article-title":"Gemmini: Enabling systematic deep-learning architecture evaluation via full-stack integration","author":"Genc","year":"2021"},{"key":"10.1016\/j.vlsi.2026.102782_b26","series-title":"Proceedings of the 36th International Conference on Computer-Aided Design","first-page":"992","article-title":"ASAP7 predictive design kit development and cell design technology co-optimization","author":"Vashishtha","year":"2017"}],"container-title":["Integration"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0167926026001379?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0167926026001379?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2026,7,9]],"date-time":"2026-07-09T13:24:30Z","timestamp":1783603470000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S0167926026001379"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,9]]},"references-count":26,"alternative-id":["S0167926026001379"],"URL":"https:\/\/doi.org\/10.1016\/j.vlsi.2026.102782","relation":{},"ISSN":["0167-9260"],"issn-type":[{"value":"0167-9260","type":"print"}],"subject":[],"published":{"date-parts":[[2026,9]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"Trust-aware LLM-assisted Bayesian optimization for efficient design space exploration","name":"articletitle","label":"Article Title"},{"value":"Integration","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.vlsi.2026.102782","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2026 Elsevier B.V. All rights are reserved, including those for text and data mining, AI training, and similar technologies.","name":"copyright","label":"Copyright"}],"article-number":"102782"}}