{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,4]],"date-time":"2024-12-04T05:31:47Z","timestamp":1733290307612,"version":"3.30.1"},"reference-count":13,"publisher":"Elsevier BV","issue":"4","license":[{"start":{"date-parts":[[2001,4,1]],"date-time":"2001-04-01T00:00:00Z","timestamp":986083200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microelectronics Reliability"],"published-print":{"date-parts":[[2001,4]]},"DOI":"10.1016\/s0026-2714(00)00233-x","type":"journal-article","created":{"date-parts":[[2002,7,25]],"date-time":"2002-07-25T14:37:42Z","timestamp":1027607862000},"page":"597-604","source":"Crossref","is-referenced-by-count":0,"title":["Study on the degradation induced by donor interface state in deep-sub-micron grooved-gate P-channel MOSFET\u2019s"],"prefix":"10.1016","volume":"41","author":[{"given":"Hongxia","family":"Ren","sequence":"first","affiliation":[]},{"given":"Yue","family":"Hao","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/S0026-2714(00)00233-X_BIB1","first-page":"375","article-title":"Hot-electron-induced MOSFET degradation-model, monitor and improvement","volume":"33","author":"Hu","year":"1985","journal-title":"IEEE Trans Electron Dev"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB2","doi-asserted-by":"crossref","first-page":"463","DOI":"10.1109\/EDL.1987.26695","article-title":"Design and experimental technology for 0.1 \u03bcm gate-length low-temperature operation FET\u2019s","volume":"ED-8","author":"Sai-halasz","year":"1987","journal-title":"IEEE Electron Dev Lett"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB3","doi-asserted-by":"crossref","unstructured":"Omura Y, Nakashima S, Izumo K, Ishii T. 0.1 \u03bcm-gate, ultra-thin CMOS devices using SIMOX substrate with 80 nm thick buried oxide layer. IEDM Tech Dig 1991:675\u20138","DOI":"10.1109\/IEDM.1991.235332"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB4","doi-asserted-by":"crossref","first-page":"244","DOI":"10.1109\/EDL.1986.26359","article-title":"Subthreshold slope of thin-film SOI MOSFET\u2019s","volume":"EDL-7","author":"Colinge","year":"1986","journal-title":"IEEE Electron Dev Lett"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB5","doi-asserted-by":"crossref","unstructured":"Imura SK, Noda H, Hisamoto D, Takeda E. A 0.1 \u03bcm-gate elevated source and drain MOSFET' fabricated by phase-shifted lithography. IEDM Tech Dig 1991: 950\u20132","DOI":"10.1109\/IEDM.1991.235269"},{"issue":"8","key":"10.1016\/S0026-2714(00)00233-X_BIB6","doi-asserted-by":"crossref","first-page":"396","DOI":"10.1109\/55.225591","article-title":"Simulation of sub-0.1 \u03bcm Mosfet\u2019s with completely suppressed short-channel effect","volume":"14","author":"Tanaka","year":"1993","journal-title":"ED-Lett"},{"issue":"4","key":"10.1016\/S0026-2714(00)00233-X_BIB7","doi-asserted-by":"crossref","first-page":"157","DOI":"10.1109\/55.485159","article-title":"A novel 0.1 \u03bcm MOSFET Structure with inverted sidewall and recessed channel","volume":"17","author":"Lyu","year":"1996","journal-title":"IEEE Electron Dev Lett"},{"issue":"8","key":"10.1016\/S0026-2714(00)00233-X_BIB8","doi-asserted-by":"crossref","first-page":"1251","DOI":"10.1109\/16.506776","article-title":"Short-channel effect immunity and current capability of sub-0.1 \u03bcm MOSFET\u2019s using a recessed channel","volume":"43","author":"Bricout","year":"1996","journal-title":"IEEE Trans Electron Dev"},{"issue":"1","key":"10.1016\/S0026-2714(00)00233-X_BIB9","doi-asserted-by":"crossref","first-page":"94","DOI":"10.1109\/16.370030","article-title":"Short-channel-effect-suppressed sub-0.1-\u03bcm grooved-gate MOSFET\u2019s with W gate","volume":"42","author":"Kimura","year":"1995","journal-title":"IEEE Trans Electron Dev"},{"issue":"1","key":"10.1016\/S0026-2714(00)00233-X_BIB10","doi-asserted-by":"crossref","first-page":"109","DOI":"10.1109\/16.370028","article-title":"Three hot-carrier degradation mechanisms in deep-submicron PMOSFET\u2019s","volume":"42","author":"Woltjer","year":"1995","journal-title":"IEEE Trans Electron Dev"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB11","unstructured":"Ren HX, Hao Y. Study on the degradation induced by acceptor interface state for deep-sub-micron PMOSFET, in press"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB12","unstructured":"Technology Modeling Associates, Inc., MEDICI Two-Dimensional Device Simulation Program Version 2.3. User\u2019s Manual, Vol. 2, 1997"},{"key":"10.1016\/S0026-2714(00)00233-X_BIB13","unstructured":"Technology Modeling Associates, Inc., TSUPREM-4 Two-Dimensional Process Simulation Program Version 6.5. User\u2019s Manual, Vol 1, 1997"}],"container-title":["Microelectronics Reliability"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S002627140000233X?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S002627140000233X?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2024,12,4]],"date-time":"2024-12-04T03:28:26Z","timestamp":1733282906000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S002627140000233X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001,4]]},"references-count":13,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2001,4]]}},"alternative-id":["S002627140000233X"],"URL":"https:\/\/doi.org\/10.1016\/s0026-2714(00)00233-x","relation":{},"ISSN":["0026-2714"],"issn-type":[{"type":"print","value":"0026-2714"}],"subject":[],"published":{"date-parts":[[2001,4]]}}}