{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,7]],"date-time":"2025-06-07T06:24:14Z","timestamp":1749277454622},"reference-count":10,"publisher":"Elsevier BV","issue":"1","license":[{"start":{"date-parts":[[2003,1,1]],"date-time":"2003-01-01T00:00:00Z","timestamp":1041379200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microelectronics Reliability"],"published-print":{"date-parts":[[2003,1]]},"DOI":"10.1016\/s0026-2714(02)00125-7","type":"journal-article","created":{"date-parts":[[2003,3,4]],"date-time":"2003-03-04T16:29:22Z","timestamp":1046795362000},"page":"61-69","source":"Crossref","is-referenced-by-count":10,"title":["LVTSCR structures for latch-up free ESD protection of BiCMOS RF circuits"],"prefix":"10.1016","volume":"43","author":[{"given":"V.","family":"Vashchenko","sequence":"first","affiliation":[]},{"given":"A.","family":"Concannon","sequence":"additional","affiliation":[]},{"given":"M.","family":"ter Beek","sequence":"additional","affiliation":[]},{"given":"P.","family":"Hopper","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/S0026-2714(02)00125-7_BIB1","doi-asserted-by":"crossref","first-page":"425","DOI":"10.1016\/S0038-1101(99)00247-6","article-title":"Cascoded LVTSCR with tunable holding voltage for ESD protection in bulk CMOS technology without latchup danger","volume":"44","author":"Ker","year":"2000","journal-title":"Solid-State Electron."},{"key":"10.1016\/S0026-2714(02)00125-7_BIB2","first-page":"1681","article-title":"ESD protection for high frequency integrated circuits","volume":"38","author":"Groph","year":"1998","journal-title":"Solid-State Electron."},{"key":"10.1016\/S0026-2714(02)00125-7_BIB3","first-page":"337","article-title":"Bipolar SCR ESD protection for high speed submicron Bipolar\/BiCMOS frequency integrated circuits","author":"Chen","year":"1995","journal-title":"IEDM"},{"key":"10.1016\/S0026-2714(02)00125-7_BIB4","doi-asserted-by":"crossref","first-page":"1799","DOI":"10.1016\/S0038-1101(01)00187-3","article-title":"MOSFET triggering silicon controlled rectifiers for electrostatic discharge protection circuits","volume":"45","author":"Jang","year":"2001","journal-title":"Solid-State Electron."},{"key":"10.1016\/S0026-2714(02)00125-7_BIB5","doi-asserted-by":"crossref","first-page":"1761","DOI":"10.1016\/S0038-1101(97)00174-3","article-title":"Electrical instability and filamentation in ggMOS protection structures","volume":"41","author":"Vashchenko","year":"1997","journal-title":"Solid-State Electron."},{"key":"10.1016\/S0026-2714(02)00125-7_BIB6","doi-asserted-by":"crossref","first-page":"513","DOI":"10.1109\/16.485531","article-title":"Negative differential conductivity and isothermal drain breakdown of the GaAs MESFET","volume":"43","author":"Vashchenko","year":"1996","journal-title":"IEEE Trans. Electron Dev."},{"key":"10.1016\/S0026-2714(02)00125-7_BIB7","doi-asserted-by":"crossref","first-page":"2080","DOI":"10.1109\/16.544378","article-title":"Electrical current instability at gate breakdown in GaAs MESFET","volume":"43","author":"Vashchenko","year":"1996","journal-title":"IEEE Trans. Electron Dev."},{"key":"10.1016\/S0026-2714(02)00125-7_BIB8","unstructured":"\u201cTSUPREME4\u201d, \u201cMEDICI 2001.4.0. Two-dimensional device simulation program\u201d, Fremont: Avant!, 2001"},{"key":"10.1016\/S0026-2714(02)00125-7_BIB9","doi-asserted-by":"crossref","unstructured":"Wu J, Juliano P, Rosenbaum E. Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions. ESD\/EOS Symp. 2000;287\u2013295","DOI":"10.1109\/EOSESD.2000.890088"},{"key":"10.1016\/S0026-2714(02)00125-7_BIB10","unstructured":"Russ CC, Mergens PJ, Verhaege KG, Armer J, Jozwiak PC, Kolluri G, Avery LR. GGSCR\u2019s: GGNMOS triggered silicon controlled rectifiers for ESD protection in deep sub-micron CMOS process. ESD\/EOS Symp. 2001;22\u201331"}],"container-title":["Microelectronics Reliability"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0026271402001257?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0026271402001257?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,31]],"date-time":"2019-03-31T12:53:13Z","timestamp":1554036793000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S0026271402001257"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003,1]]},"references-count":10,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2003,1]]}},"alternative-id":["S0026271402001257"],"URL":"https:\/\/doi.org\/10.1016\/s0026-2714(02)00125-7","relation":{},"ISSN":["0026-2714"],"issn-type":[{"value":"0026-2714","type":"print"}],"subject":[],"published":{"date-parts":[[2003,1]]}}}