{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,29]],"date-time":"2025-10-29T03:13:18Z","timestamp":1761707598998},"reference-count":15,"publisher":"Elsevier BV","issue":"7","license":[{"start":{"date-parts":[[2003,7,1]],"date-time":"2003-07-01T00:00:00Z","timestamp":1057017600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microelectronics Reliability"],"published-print":{"date-parts":[[2003,7]]},"DOI":"10.1016\/s0026-2714(03)00125-2","type":"journal-article","created":{"date-parts":[[2003,6,30]],"date-time":"2003-06-30T13:29:20Z","timestamp":1056979760000},"page":"993-1000","source":"Crossref","is-referenced-by-count":44,"title":["High holding current SCRs (HHI-SCR) for ESD protection and latch-up immune IC operation"],"prefix":"10.1016","volume":"43","author":[{"given":"Markus P.J.","family":"Mergens","sequence":"first","affiliation":[]},{"given":"Christian C.","family":"Russ","sequence":"additional","affiliation":[]},{"given":"Koen G.","family":"Verhaege","sequence":"additional","affiliation":[]},{"given":"John","family":"Armer","sequence":"additional","affiliation":[]},{"given":"Phillip C.","family":"Jozwiak","sequence":"additional","affiliation":[]},{"given":"Russ","family":"Mohn","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/S0026-2714(03)00125-2_BIB1","first-page":"22","article-title":"GGSCRs: GGNMOS Triggered Silicon Controlled Rectifiers for ESD protection in deep sub-micron CMOS processes","author":"Russ","year":"2001","journal-title":"EOS\/ESD"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB2","first-page":"177","article-title":"Using SCRs as transient protection structures in integrated circuits","author":"Avery","year":"1983","journal-title":"EOS\/ESD"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB3","doi-asserted-by":"crossref","first-page":"21","DOI":"10.1109\/55.75685","article-title":"A low voltage triggering SCR for on-chip ESD protection at output and input pads","volume":"12","author":"Chatterjee","year":"1991","journal-title":"IEEE EDL"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB4","series-title":"ESD in silicon integrated circuits","author":"Amerasekera","year":"1995"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB5","first-page":"106","article-title":"Bi-modal triggering for LVSCR ESD protection devices","author":"Diaz","year":"1994","journal-title":"EOS\/ESD"},{"issue":"11","key":"10.1016\/S0026-2714(03)00125-2_BIB6","doi-asserted-by":"crossref","first-page":"2128","DOI":"10.1109\/16.877175","article-title":"Analysis of 40 V-LDMOS power devices under ESD stress conditions","volume":"47","author":"Mergens","year":"2000","journal-title":"IEEE Trans. Electron. Dev."},{"key":"10.1016\/S0026-2714(03)00125-2_BIB7","article-title":"ESD protection design for RF and advanced technology applications","author":"Verhaege","year":"2002","journal-title":"Tutorial EOS\/ESD"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB8","first-page":"287","article-title":"Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions","author":"Wu","year":"2000","journal-title":"EOS\/ESD"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB9","first-page":"72","article-title":"How to safely apply the LVTSCR for CMOS whole-chip protection without being accidentally triggered on","author":"Ker","year":"1998","journal-title":"EOS\/ESD"},{"issue":"8","key":"10.1016\/S0026-2714(03)00125-2_BIB10","doi-asserted-by":"crossref","first-page":"1293","DOI":"10.1109\/4.604093","article-title":"ESD protection for CMOS output buffer by using modified LVTSCR devices with high trigger current","volume":"32","author":"Ker","year":"1997","journal-title":"IEEE Solid-State Circuits"},{"issue":"4","key":"10.1016\/S0026-2714(03)00125-2_BIB11","doi-asserted-by":"crossref","first-page":"849","DOI":"10.1109\/16.662790","article-title":"Lateral SCR devices with low-voltage high-current triggering characteristics for output ESD protection in sub-micron CMOS technology","volume":"45","author":"Ker","year":"1998","journal-title":"IEEE Trans. Electron. Dev."},{"key":"10.1016\/S0026-2714(03)00125-2_BIB12","first-page":"209","article-title":"ESD protection of BiCMOS integrated circuits, which need to operate in the harsh environments of automotive or industrial","author":"Corsi","year":"1993","journal-title":"EOS\/ESD"},{"issue":"10\/11","key":"10.1016\/S0026-2714(03)00125-2_BIB13","doi-asserted-by":"crossref","first-page":"1457","DOI":"10.1016\/S0026-2714(97)00086-3","article-title":"Using an SCR as ESD protection without latch-up danger","volume":"37","author":"Notermans","year":"1997","journal-title":"Microelectron. Reliab."},{"key":"10.1016\/S0026-2714(03)00125-2_BIB14","series-title":"Physics of semiconductor devices","author":"Sze","year":"1981"},{"key":"10.1016\/S0026-2714(03)00125-2_BIB15","first-page":"1","article-title":"Multi-finger turn-on circuits and design techniques for enhanced ESD performance and width-scaling","author":"Mergens","year":"2001","journal-title":"EOS\/ESD"}],"container-title":["Microelectronics Reliability"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0026271403001252?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0026271403001252?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,18]],"date-time":"2019-03-18T08:55:01Z","timestamp":1552899301000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S0026271403001252"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003,7]]},"references-count":15,"journal-issue":{"issue":"7","published-print":{"date-parts":[[2003,7]]}},"alternative-id":["S0026271403001252"],"URL":"https:\/\/doi.org\/10.1016\/s0026-2714(03)00125-2","relation":{},"ISSN":["0026-2714"],"issn-type":[{"value":"0026-2714","type":"print"}],"subject":[],"published":{"date-parts":[[2003,7]]}}}