{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,9]],"date-time":"2024-09-09T17:53:14Z","timestamp":1725904394361},"reference-count":24,"publisher":"Elsevier BV","issue":"7","license":[{"start":{"date-parts":[[2001,6,1]],"date-time":"2001-06-01T00:00:00Z","timestamp":991353600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Parallel Computing"],"published-print":{"date-parts":[[2001,6]]},"DOI":"10.1016\/s0167-8191(01)00089-8","type":"journal-article","created":{"date-parts":[[2002,7,25]],"date-time":"2002-07-25T15:01:26Z","timestamp":1027609286000},"page":"897-912","source":"Crossref","is-referenced-by-count":9,"title":["Modeling data locality for the sparse matrix\u2013vector product using distance measures"],"prefix":"10.1016","volume":"27","author":[{"given":"D.B.","family":"Heras","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.C.","family":"Cabaleiro","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.F.","family":"Rivera","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"issue":"2","key":"10.1016\/S0167-8191(01)00089-8_BIB1","doi-asserted-by":"crossref","first-page":"184","DOI":"10.1145\/63404.63407","article-title":"An analytical cache model","volume":"7","author":"Agarwal","year":"1989","journal-title":"ACM Transactions on Computer Systems"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB2","series-title":"Templates for the Solution of Linear Systems: Building Blocks for Iterative Methods","author":"Barret","year":"1994"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB3","doi-asserted-by":"crossref","unstructured":"R. Boisvert. Matrix market: a web resource for test matrix collections, in: Townmeeting on Online Delivery of NIST Reference Data, Gaithersburg, MD, May 1997, NIST. http:\/\/math.nist.gov\/MatrixMarket\/","DOI":"10.1007\/978-1-5041-2940-4_9"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB4","series-title":"Regression Analysis by Example","author":"Chatterjee","year":"1991"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB5","doi-asserted-by":"crossref","unstructured":"T.M. Chilimbi, M.D. Hill, J.R. Larus, Cache-concious structure layout, in: Proc. ACM SIGPLAN'99 Conference on Programmign Language Design and Implementation, May 1999","DOI":"10.1145\/301618.301633"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB6","unstructured":"Digital Equipment Corporation, pfm \u2013 the 21064 performance counter pseudo-device, DEC OSF\/1 Manual pages, 1995"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB7","doi-asserted-by":"crossref","unstructured":"B.B. Fraguela, R. Doallo, E.L. Zapata, Modeling set associative caches behavior for irregular computations, in: Proc. SIGMETRICS\/PERFORMANCE98, ACM Performance Evaluation Review 26 (1) (1998) 192\u2013201","DOI":"10.1145\/277851.277910"},{"issue":"3","key":"10.1016\/S0167-8191(01)00089-8_BIB8","doi-asserted-by":"crossref","first-page":"347","DOI":"10.1142\/S0129626499000323","article-title":"Memory hierarchy performance prediction for blocked sparse algorithms","volume":"9","author":"Fraguela","year":"1999","journal-title":"Parallel Processing Letters"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB9","doi-asserted-by":"crossref","first-page":"587","DOI":"10.1016\/0743-7315(88)90014-7","article-title":"Strategies for cache and local memory management by global program transformation","volume":"5","author":"Gannon","year":"1988","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB10","unstructured":"S. Ghosh, M. Martonosi, S. Malik, An analytical representation of cache misses, in: Proc. 11th ACM International Conference on Supercomputing, 1997"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB11","series-title":"Computer Architectures: A Quantitative Approach","author":"Hennesy","year":"1990"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB12","doi-asserted-by":"crossref","unstructured":"D.B. Heras, V. Blanco, J.C. Cabaleiro, F.F. Rivera, Modeling and Improving Locality for the Sparse Matrix\u2013Vector Product on Cache Memories (special issue on High Performance Numerical Methods and Applications), Future Generation Computer Systems (2000), to be published","DOI":"10.1016\/S0167-739X(00)00075-3"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB13","unstructured":"D.B. Heras, Modelling and improvement of locality for irregular codes, Ph.D. Thesis, Department of Electronics and Computer Science, University of Santiago de Compostela, February 2000 (in Spanish)"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB14","doi-asserted-by":"crossref","unstructured":"M.D. Hill, Aspects of cache memory and instruction buffer performance, Ph.D. Thesis, Berkeley Computer Science Division, University of California, Berkeley, 1987","DOI":"10.21236\/ADA604007"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB15","doi-asserted-by":"crossref","unstructured":"A.R. Lebeck, A.D. Wood, Cache profiling and the SPEC benchmarks: a case study, IEEE Computer (1994) 15\u201326","DOI":"10.1109\/2.318580"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB16","unstructured":"N. Manjikian, T.S. Abdelrahman, Array data layout for the reduction of cache conflicts, in: Proc. 8th Int. Conference on Parallel and Distributed Computing Systems, 1998"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB17","doi-asserted-by":"crossref","unstructured":"K.S. McKinley, O. Temam. A quantitative analysis of loop nest locality, in: Proc. 7th Int. Conf. Architectural Support for Programming Languages and Operating Systems, October 1996","DOI":"10.1145\/237090.237161"},{"issue":"4","key":"10.1016\/S0167-8191(01)00089-8_BIB18","doi-asserted-by":"crossref","first-page":"384","DOI":"10.1145\/268424.268464","article-title":"Memory data organization for improved cache performance in embedded processor applications","volume":"2","author":"Panda","year":"1997","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB19","series-title":"Sparse Matrix Technology","author":"Pissanetzky","year":"1984"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB20","doi-asserted-by":"crossref","unstructured":"O. Temam, W. Jalby, Characterizing the behavior of sparse algorithms on caches, in: IEEE Int. Conf. Supercomputing (ICS'92), 1992, pp. 578\u2013587","DOI":"10.1109\/SUPERC.1992.236646"},{"issue":"2","key":"10.1016\/S0167-8191(01)00089-8_BIB21","doi-asserted-by":"crossref","first-page":"128","DOI":"10.1145\/254180.254184","article-title":"Trace-driven memory simulation: a survey","volume":"29","author":"Uhlig","year":"1997","journal-title":"ACM Computing Surveys"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB22","unstructured":"H.A.G. Wijshoff, Implementing sparse BLAS primitives on concurrent\/vector processors, in: A. Gibbons, P. Spirakis (Eds.), Lectures on Parallel Computation, vol. 4, Cambridge International Series on Parallel Computation, Cambridge University Press, Cambridge, 1993"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB23","doi-asserted-by":"crossref","unstructured":"M.E. Wolf, M.S. Lam, A data locality optimization algorithm, in: Proc. SIGPLAN'91 Conf. Programming Language Design and Implementation, June 1991","DOI":"10.1145\/113445.113449"},{"key":"10.1016\/S0167-8191(01)00089-8_BIB24","doi-asserted-by":"crossref","unstructured":"M. Zagha, B. Larson, S. Turner, M. Itzkowitz, Performance analysis using the MIPS R10000 performance counters, in: Proc. Supercomputing'96 Conference, ACM, New York and IEEE Computer Soc. Press, Silver Spring, MD, November 1996, pp. 17\u201322","DOI":"10.1145\/369028.369059"}],"container-title":["Parallel Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0167819101000898?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0167819101000898?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2020,1,10]],"date-time":"2020-01-10T00:45:52Z","timestamp":1578617152000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S0167819101000898"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001,6]]},"references-count":24,"journal-issue":{"issue":"7","published-print":{"date-parts":[[2001,6]]}},"alternative-id":["S0167819101000898"],"URL":"https:\/\/doi.org\/10.1016\/s0167-8191(01)00089-8","relation":{},"ISSN":["0167-8191"],"issn-type":[{"value":"0167-8191","type":"print"}],"subject":[],"published":{"date-parts":[[2001,6]]}}}