{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,12,28]],"date-time":"2022-12-28T21:48:58Z","timestamp":1672264138783},"reference-count":17,"publisher":"Elsevier BV","issue":"6","license":[{"start":{"date-parts":[[2002,12,1]],"date-time":"2002-12-01T00:00:00Z","timestamp":1038700800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"},{"start":{"date-parts":[[2013,7,29]],"date-time":"2013-07-29T00:00:00Z","timestamp":1375056000000},"content-version":"vor","delay-in-days":3893,"URL":"http:\/\/creativecommons.org\/licenses\/by-nc-nd\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Electronic Notes in Theoretical Computer Science"],"published-print":{"date-parts":[[2002,12]]},"DOI":"10.1016\/s1571-0661(04)80601-7","type":"journal-article","created":{"date-parts":[[2004,9,29]],"date-time":"2004-09-29T16:47:47Z","timestamp":1096476467000},"page":"84-99","source":"Crossref","is-referenced-by-count":3,"title":["Applying ELAN Strategies in Simulating Processors over Simple Architectures"],"prefix":"10.1016","volume":"70","author":[{"given":"Mauricio","family":"Ayala-Rinc\u00f3n","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rinaldi Maya","family":"Neto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ricardo P.","family":"Jacobi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Carlos H.","family":"Llanos","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Reiner W.","family":"Hartenstein","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB1","doi-asserted-by":"crossref","unstructured":"Arvind and X. Shen. Using Term Rewriting Systems to Design and Verify Processors. Technical Report 419, Laboratory for Computer Science - MIT, 1999. Also in IEEE Micro Special Issue on \u201cModeling and Validation of Microprocessors\u201d, 1999.","DOI":"10.1109\/40.768501"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB2","series-title":"Designing Arithmetic Digital Circuits via Rewriting-Logic","author":"Ayala-Rinc\u00f3n","year":"2002"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB3","series-title":"Term Rewriting and All That","author":"Baader","year":"1998"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB4","series-title":"Electronic Notes in Theoretical Computer Science, volume 15","article-title":"An overview of ELAN","author":"Borovansk\u00fd","year":"1998"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB5","series-title":"Frontiers of Combining Systems 2, Studies on Logic and Computation, 7, chapter 6","first-page":"95","article-title":"Combining Higher-Order and First-Order Computation Using \u03c1-Calculus: Towards a Semantics of ELAN","author":"Cirstea","year":"1999"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB6","doi-asserted-by":"crossref","unstructured":"R. Hartenstein. A decade of reconfigurable computing: a visionary retrospective. In Proceedings of the DATE 2001 on Design, automation and test in Europe, pages 642\u2013649. IEEE Press, 2001.","DOI":"10.1109\/DATE.2001.915091"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB7","series-title":"Computer Architecture: A Quantitative Approach","author":"Hennessy","year":"2002"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB8","unstructured":"J. C. Hoe and Arvind. Hardware Synthesis from Term Rewriting Systems. Technical Report 421 A, Laboratory for Computer Science - MIT, 1999. Also in Proc. of the Tenth IFIP International Conference on VLSI - VLSI 1999."},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB9","series-title":"Nondeterminism in Algebraic Specifications and Algebraic Programs","author":"Hussmann","year":"1993"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB10","series-title":"Recent Developments in Algebraic Specification Techniques","first-page":"168","article-title":"Non-deterministic computations in ELAN","author":"Kirchner","year":"1998"},{"issue":"2","key":"10.1016\/S1571-0661(04)80601-7_NEWBIB11","doi-asserted-by":"crossref","first-page":"207","DOI":"10.1017\/S0956796800003907","article-title":"Promoting Rewriting to a Programming Language: A Compiler for Non-Deterministic Rewrite Programs in Associative-Commutative Theories","volume":"11","author":"Kirchner","year":"2001","journal-title":"Journal of Functional Programming"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB12","unstructured":"X. Shen and Arvind. Design and Verification of Speculative Processors. Technical Report 400 A, Laboratory for Computer Science - MIT, 1998."},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB13","unstructured":"X. Shen and Arvind. Modeling and Verification of ISA Implementations. Technical Report 400 B, Laboratory for Computer Science - MIT, 1998."},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB14","doi-asserted-by":"crossref","unstructured":"X. Shen, Arvind, and L. Rudolph. CACHET: an adaptive cache coherence protocol for distributed shared-memory systems. In International Conference on Supercomputing, pages 135\u2013144. ACM, 1999.","DOI":"10.1145\/305138.305187"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB15","series-title":"Advanced Computer Architectures: a Design Space Approach","author":"Sima","year":"1997"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB16","doi-asserted-by":"crossref","unstructured":"J. Stoy, X. Shen, and Arvind. Proofs of Correctness of Cache-Coherence Protocols. In FME 2001: Formal Methods for Increasing Software Productivity, Int. Symposium of Formal Methods Europe, volume 2021 of LNCS, pages 43\u201371. Springer, 2001.","DOI":"10.1007\/3-540-45251-6_4"},{"key":"10.1016\/S1571-0661(04)80601-7_NEWBIB17","doi-asserted-by":"crossref","unstructured":"M. Vittek. A Compiler for Nondeterministic Term Rewriting Systems. In H. Ganzinger, editor, Proc. Seventh Int. Conf. on Rewriting Techniques and Applications RTA-96, volume 1103 of LNCS, pages 154\u2013168. Springer, July 1996.","DOI":"10.1007\/3-540-61464-8_50"}],"container-title":["Electronic Notes in Theoretical Computer Science"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1571066104806017?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1571066104806017?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2020,4,3]],"date-time":"2020-04-03T07:12:15Z","timestamp":1585897935000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S1571066104806017"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,12]]},"references-count":17,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2002,12]]}},"alternative-id":["S1571066104806017"],"URL":"https:\/\/doi.org\/10.1016\/s1571-0661(04)80601-7","relation":{},"ISSN":["1571-0661"],"issn-type":[{"value":"1571-0661","type":"print"}],"subject":[],"published":{"date-parts":[[2002,12]]}}}