{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,29]],"date-time":"2026-03-29T16:29:19Z","timestamp":1774801759691,"version":"3.50.1"},"reference-count":25,"publisher":"Springer Science and Business Media LLC","issue":"2-3","license":[{"start":{"date-parts":[[2000,5,1]],"date-time":"2000-05-01T00:00:00Z","timestamp":957139200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2000,5,1]],"date-time":"2000-05-01T00:00:00Z","timestamp":957139200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Real-Time Systems"],"published-print":{"date-parts":[[2000,5]]},"DOI":"10.1023\/a:1008189014032","type":"journal-article","created":{"date-parts":[[2002,12,22]],"date-time":"2002-12-22T08:17:47Z","timestamp":1040545067000},"page":"129-156","source":"Crossref","is-referenced-by-count":76,"title":["Supporting Timing Analysis by Automatic Bounding of Loop Iterations"],"prefix":"10.1007","volume":"18","author":[{"given":"Christopher","family":"Healy","sequence":"first","affiliation":[]},{"given":"Mikael","family":"Sj\u00f6din","sequence":"additional","affiliation":[]},{"given":"Viresh","family":"Rustagi","sequence":"additional","affiliation":[]},{"given":"David","family":"Whalley","sequence":"additional","affiliation":[]},{"given":"Robert van","family":"Engelen","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"255146_CR1","volume-title":"Compilers Principles, Techniques, and Tools","author":"A. V. Aho","year":"1986","unstructured":"Aho, A. V., Sethi, R., and Ullman, J. D. 1986. Compilers Principles, Techniques, and Tools. Reading, MA: Addison-Wesley."},{"key":"255146_CR2","doi-asserted-by":"crossref","unstructured":"Arnold, R., Mueller, F., Whalley, D., and Harmon, M. 1994. Bounding worst-case instruction cache performance. Proceedings of the Fifteenth IEEE Real-Time Systems Symposium San Juan, Puerto Rico, pp. 172\u2013181.","DOI":"10.1109\/REAL.1994.342718"},{"key":"255146_CR3","doi-asserted-by":"crossref","unstructured":"Benitez, M. E., and Davidson, J. W. 1988. A portable global optimizer and kinker. Proceedings of the SIGPLAN '88 Symposium on Programming Language Design and Implementation Atlanta, GA, pp. 329\u2013338.","DOI":"10.1145\/53990.54023"},{"key":"255146_CR4","doi-asserted-by":"crossref","first-page":"145","DOI":"10.1007\/BF00365316","volume":"11","author":"A. Burns","year":"1996","unstructured":"Burns, A., Chapman, R., and Wellings, A. 1996. Combining static worst-case timing analysis and program proof. Real-Time Systems Journal 11: 145\u2013171.","journal-title":"Real-Time Systems Journal"},{"key":"255146_CR5","unstructured":"Char, B., Geddes, K., Gonnet, G., Monagan, M., and Watt, S. 1988. MAPLE Reference Manual. Waterloo, Canada."},{"key":"255146_CR6","doi-asserted-by":"crossref","unstructured":"Ermedahl, A., and Gustafsson, J. 1997. Deriving annotations for tight calculation of execution time. Proceedings of European Conference on Parallel Processing: 1298\u20131307.","DOI":"10.1007\/BFb0002886"},{"issue":"1","key":"255146_CR7","doi-asserted-by":"crossref","first-page":"53","DOI":"10.1109\/12.743411","volume":"48","author":"C. Healy","year":"1999","unstructured":"Healy, C., Arnold, R., Mueller, F., Whalley, D., and Harmon, M. 1999. Bounding pipeline and instruction cache performance. IEEE Transactions on Computers 48(1): 53\u201370.","journal-title":"IEEE Transactions on Computers"},{"key":"255146_CR8","doi-asserted-by":"crossref","unstructured":"Healy, C. A., and Whalley, D. B. 1999. Tighter timing predictions by automatic detection and exploitation of value-dependent constraints. Proceedings of the IEEE Real-Time Technology and Applications Symposium Vancouver, Canada, pp. 79\u201388.","DOI":"10.1109\/RTTAS.1999.777663"},{"key":"255146_CR9","doi-asserted-by":"crossref","unstructured":"Healy, C. A., Whalley, D. B., and Harmon, M. G. 1995. Integrating the timing analysis of pipelining and instruction caching. Proceedings of the Sixteenth IEEE Real-Time Systems Symposium Pisa, Italy, pp. 288\u2013297.","DOI":"10.1109\/REAL.1995.495218"},{"key":"255146_CR10","volume-title":"Computer Architecture: A Quantitative Approach","author":"J. Hennessy","year":"1996","unstructured":"Hennessy, J., and Patterson, D. 1996. Computer Architecture: A Quantitative Approach, Second Edition. San Francisco: Morgan Kaufmann.","edition":"Second Edition"},{"key":"255146_CR11","unstructured":"Hur, Y., Bae, Y., Lim, S., Kim, S., Rhee, B., Min, S., Park, C., Lee, M., Shin, H., and Kim, C. 1995. Worst case timing analysis of RISC processors: R3000\/R3010 case study. Proceedings of the IEEE Real-Time Systems Symposium Pisa, Italy."},{"issue":"9","key":"255146_CR12","doi-asserted-by":"crossref","first-page":"941","DOI":"10.1109\/TSE.1986.6313049","volume":"12","author":"E. Kligerman","year":"1986","unstructured":"Kligerman, E., and Stoyenko, A. 1986. Real-time Euclid: A language for reliable real-time systems. IEEE Transactions on Software Engineering 12(9): 941\u2013949.","journal-title":"IEEE Transactions on Software Engineering"},{"key":"255146_CR13","doi-asserted-by":"crossref","unstructured":"Lam, M. 1998. Software pipelining: An effective scheduling technique for VLIW machines. Proceedings of the SIGPLAN '88 Symposium on Programming Language Design and Implementation Atlanta, GA, pp. 318\u2013328.","DOI":"10.1145\/53990.54022"},{"key":"255146_CR14","doi-asserted-by":"crossref","unstructured":"Li, Y. S., Malik, S., and Wolfe, A. 1995. Efficient microarchitecture modeling and path analysis for real-time software. Proceedings of the Sixteenth IEEE Real-Time Systems Symposium Pisa, Italy, pp. 298\u2013307.","DOI":"10.1109\/REAL.1995.495219"},{"key":"255146_CR15","doi-asserted-by":"crossref","unstructured":"Liu, Y., and Gomez, G. 1998. Automatic accurate time-bound analysis for high-level languages. ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems: 31\u201340.","DOI":"10.1007\/BFb0057778"},{"key":"255146_CR16","doi-asserted-by":"crossref","unstructured":"Lundqvist, T., and Stenstr\u00f6m, P. 1998. Integrating path and timing analysis using instruction-level simulation techniques. ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems: 1\u201315.","DOI":"10.1007\/BFb0057776"},{"issue":"5","key":"255146_CR17","doi-asserted-by":"crossref","first-page":"48","DOI":"10.1109\/2.76286","volume":"24","author":"C. Y. Park","year":"1991","unstructured":"Park, C. Y., and Shaw, A. C. 1991. Experiments with a program timing tool based on a source-level timing schema. Computer 24(5): 48\u201357.","journal-title":"Computer"},{"issue":"2","key":"255146_CR18","doi-asserted-by":"crossref","first-page":"159","DOI":"10.1007\/BF00571421","volume":"1","author":"P. Puschner","year":"1989","unstructured":"Puschner, P., and Koza, C. 1989. Calculating the maximum execution time of real-time programs. Real-Time Systems 1(2): 159\u2013176.","journal-title":"Real-Time Systems"},{"key":"255146_CR19","volume-title":"On the Quest for Perfect Load Balance in Loop-Based Parallel Computations","author":"R. Sakellariou","year":"1996","unstructured":"Sakellariou, R. 1996. On the Quest for Perfect Load Balance in Loop-Based Parallel Computations. Department of Computer Science, University of Manchester, Manchester, England."},{"key":"255146_CR20","first-page":"685","volume":"2","author":"R. Sakellariou","year":"1997","unstructured":"Sakellariou, R. 1997. Symbolic evaluation of sums for parallelising compilers. Proceedings of the 15th IMACS World Congress on Scientific Computation, Modelling and Applied Mathematics, Volume 2, Wissenschaft & Technik Verlag, pp. 685-690.","journal-title":"Proceedings of the 15th IMACS World Congress on Scientific Computation, Modelling and Applied Mathematics"},{"key":"255146_CR21","volume-title":"High-Performance Computer Architecture","author":"H. S. Stone","year":"1990","unstructured":"Stone, H. S. 1990. High-Performance Computer Architecture, Second Edition. Reading, MA: Addison Wesley. Texas Instruments, Inc. 1993. Product Preview of the TMS390S10 Integrated SPARC Processor. Dallas, TX","edition":"Second Edition"},{"key":"255146_CR22","doi-asserted-by":"crossref","unstructured":"van Engelen, R., Wolters, L., and Cats, G. 1996. Ctadel: Agenerator of multi-platform high performance codes for PDE-based scientific applications. Proceedings of the 10th ACM International Conference on Supercomputing Philadelphia, PA, pp. 86-93.","DOI":"10.1145\/237578.237589"},{"issue":"3","key":"255146_CR23","doi-asserted-by":"crossref","first-page":"22","DOI":"10.1109\/99.615428","volume":"4","author":"R. van Engelen","year":"1997","unstructured":"van Engelen, R., Wolters, L., and Cats, G. 1997. Tomorrow's weather forecast: Automatic code generation for atmospheric modeling. IEEE Journal of Computational Science and Engineering 4(3): 22\u201331.","journal-title":"IEEE Journal of Computational Science and Engineering"},{"key":"255146_CR24","doi-asserted-by":"crossref","unstructured":"White, R. T., Mueller, F., Healy, C. A., Whalley, D. B., and Harmon, M. G. 1997. Timing analysis for data caches and set-associative caches. Proceedings of the IEEE Real-Time Technology and Applications Symposium Montreal, Canada, pp. 192\u2013202.","DOI":"10.1109\/RTTAS.1997.601358"},{"key":"255146_CR25","volume-title":"High Performance Compilers for Parallel Computers","author":"M. J. Wolfe","year":"1996","unstructured":"Wolfe, M. J. 1996. High Performance Compilers for Parallel Computers. Redwood City, CA: Addison-Wesley."}],"container-title":["Real-Time Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1008189014032.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1023\/A:1008189014032\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1008189014032.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,8]],"date-time":"2025-08-08T07:35:09Z","timestamp":1754638509000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1023\/A:1008189014032"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000,5]]},"references-count":25,"journal-issue":{"issue":"2-3","published-print":{"date-parts":[[2000,5]]}},"alternative-id":["255146"],"URL":"https:\/\/doi.org\/10.1023\/a:1008189014032","relation":{},"ISSN":["0922-6443","1573-1383"],"issn-type":[{"value":"0922-6443","type":"print"},{"value":"1573-1383","type":"electronic"}],"subject":[],"published":{"date-parts":[[2000,5]]}}}