{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,14]],"date-time":"2025-07-14T03:10:02Z","timestamp":1752462602684,"version":"3.41.2"},"reference-count":42,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2002,7,1]],"date-time":"2002-07-01T00:00:00Z","timestamp":1025481600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2002,7,1]],"date-time":"2002-07-01T00:00:00Z","timestamp":1025481600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Design Automation for Embedded Systems"],"published-print":{"date-parts":[[2002,7]]},"DOI":"10.1023\/a:1016511712014","type":"journal-article","created":{"date-parts":[[2002,12,28]],"date-time":"2002-12-28T22:32:49Z","timestamp":1041114769000},"page":"401-424","source":"Crossref","is-referenced-by-count":9,"title":["Synthesizing Energy-Efficient Embedded Systems with LOPOCOS"],"prefix":"10.1007","volume":"6","author":[{"given":"Marcus T.","family":"Schmitz","sequence":"first","affiliation":[]},{"given":"Bashir M.","family":"Al-Hashimi","sequence":"additional","affiliation":[]},{"given":"Petru","family":"Eles","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"5091185_CR1","unstructured":"WITAS: The Wallenberg Laboratory for Research on Information Technology and Autonomous System. http:\/\/www.ida.liu.se\/ext\/witas\/."},{"key":"5091185_CR2","unstructured":"Intel\u00ae XScale\u2122 Core, Developer's Manual, December 2000. Order Number 273473-001."},{"key":"5091185_CR3","unstructured":"Mobile AMD Athlon\u2122 4, Processor Model 6 CPGA Data Sheet, November 2000. Publication No 24319 Rev E."},{"issue":"12","key":"5091185_CR4","doi-asserted-by":"crossref","first-page":"685","DOI":"10.1145\/361604.361619","volume":"17","author":"T. Adam","year":"1974","unstructured":"Adam, T., K. Chandy, and J. Dickson. A Comparison of List Scheduling for Parallel Processing Systems. J. Communications of the ACM, vol. 17,no. 12, pp. 685-690, December 1974.","journal-title":"J. Communications of the ACM"},{"key":"5091185_CR5","doi-asserted-by":"crossref","unstructured":"Bambha, N., S. Bhattacharyya, J. Teich, and E. Zitzler. Hybrid Global\/Local Search Strategies for Dynamic Voltage Scaling in Embedded Multiprocessors. In Proc. 1st Int. Symp. Hardware\/Software Co-Design (CODES'01), April 2001, pp. 243-248.","DOI":"10.1145\/371636.371744"},{"issue":"4","key":"5091185_CR6","doi-asserted-by":"crossref","first-page":"351","DOI":"10.1145\/323480.323482","volume":"4","author":"L. Benini","year":"1999","unstructured":"Benini, L., G. De Micheli, E. Macii, M. Poncino, and R. Scarsi. Symbolic Synthesis of Clock-Gating Logic for Power Optimization of Synchronous Controllers. ACM Trans. on Design Automation of Electronic Systems, vol. 4,no. 4, pp. 351-375, 1999.","journal-title":"ACM Trans. on Design Automation of Electronic Systems"},{"key":"5091185_CR7","doi-asserted-by":"crossref","unstructured":"Brandolese, C., W. Fornaciari, F. Salice, and D. Sciuto. Energy Estimation for 32 bit Microprocessors. In Proc. 8th Int. Workshop Hardware\/Software Co-Design (CODES'00), May 2000, pp. 24-28.","DOI":"10.1109\/HSC.2000.843701"},{"issue":"11","key":"5091185_CR8","doi-asserted-by":"crossref","first-page":"1571","DOI":"10.1109\/4.881202","volume":"35","author":"T. D. Burd","year":"2000","unstructured":"Burd, T. D., T. A. Pering, A. J. Stratakos, and R. W. Brodersen. A Dynamic Voltage Scaled Microprocessor System. IEEE J. Solid-State Circuits, vol. 35,no. 11, pp. 1571-1580, November 2000.","journal-title":"IEEE J. Solid-State Circuits"},{"key":"5091185_CR9","doi-asserted-by":"crossref","unstructured":"Dave, B. P., G. Lakshminarayana, and N. K. Jha. COSYN: Hardware-Software Co-Synthesis of Embedded Systems. In Proc. DAC, 1997, pp. 703-708.","DOI":"10.1145\/266021.266341"},{"issue":"6","key":"5091185_CR10","doi-asserted-by":"crossref","first-page":"311","DOI":"10.1016\/0141-9331(95)91153-U","volume":"19","author":"M. K. Dhodhi","year":"1995","unstructured":"Dhodhi, M. K., I. Ahmad, and R. Storer. SHEMUS: Synthesis of Heterogeneous Multiprocessor Systems. J. Microprocessors and Microsystems, vol. 19,no. 6, pp. 311-319, August 1995.","journal-title":"J. Microprocessors and Microsystems"},{"key":"5091185_CR11","doi-asserted-by":"crossref","unstructured":"Dick, R., and N. K. Jha. MOCSYN: Multiobjective core-based single-chip system synthesis. In Proc. Design, Automation and Test in Europe Conf. (DATE99), March 1999, pp. 263-270.","DOI":"10.1109\/DATE.1999.761132"},{"key":"5091185_CR12","doi-asserted-by":"crossref","unstructured":"Dick, R., D. Rhodes, and W. Wolf. TGFF: Task Graphs for free. In Proc. 5th Int. Workshop Hardware\/Software Co-Design (Codes\/CASHE'97), March 1998, pp. 97-101.","DOI":"10.1145\/278241.278309"},{"issue":"10","key":"5091185_CR13","doi-asserted-by":"crossref","first-page":"920","DOI":"10.1109\/43.728914","volume":"17","author":"R. P. Dick","year":"1998","unstructured":"Dick, R. P., and N. K. Jha. MOGAC: A Multiobjective Genetic Algorithm for Hardware-Software CoSynthesis of Distributed Embedded Systems. IEEE Trans. Computer-Aided Design, vol. 17,no. 10, pp. 920-935, Oct. 1998.","journal-title":"IEEE Trans. Computer-Aided Design"},{"issue":"5","key":"5091185_CR14","doi-asserted-by":"crossref","first-page":"472","DOI":"10.1109\/92.894152","volume":"8","author":"P. Elcs","year":"2000","unstructured":"Elcs, P., A. Doboli, P. Pop, and Z. Peng. Scheduling with Bus Access Optimization for Distributed Embedded Systems. IEEE Trans. VLSI Systems, vol. 8,no. 5, pp. 472-491, Oct. 2000.","journal-title":"IEEE Trans. VLSI Systems"},{"issue":"4","key":"5091185_CR15","doi-asserted-by":"crossref","first-page":"64","DOI":"10.1109\/54.245964","volume":"10","author":"R. Ernst","year":"1993","unstructured":"Ernst, R., J. Henkel, and Th. Brenner. Hardware-Software Co-Synthesis for Micro-Controllers. IEEE Design & Test of Comp., vol. 10,no. 4, pp. 64-75, Dec. 1993.","journal-title":"IEEE Design & Test of Comp."},{"key":"5091185_CR16","unstructured":"Goldberg, D. E. Genetic Algorithms in Search, Optimization & Machine Learning. Addison-Wesley Publishing Company, 1989."},{"key":"5091185_CR17","doi-asserted-by":"crossref","unstructured":"Grajcar, M. Genetic List Scheduling Algorithm for Scheduling and Allocation on a Loosely Coupled Heterogeneous Multiprocessor System. In Proc. IEEE 36th Design Automation Conf. (DAC99), 1999, pp. 280-285.","DOI":"10.1145\/309847.309931"},{"key":"5091185_CR18","doi-asserted-by":"crossref","unstructured":"Gruian, F., and K. Kuchcinski. LEneS: Task Scheduling for Low-Energy Systems Using Variable Supply Voltage Processors. In Proc. Asia South Pacific-Design Automation Conf. (ASP-DAC'01), Jan. 2001, pp. 449-455.","DOI":"10.1145\/370155.370511"},{"key":"5091185_CR19","unstructured":"Gupta, R. K., Co-Synthesis of Hardware and Software for Digital Embedded Systems. Ph.D. thesis, Stanford University, December 1993."},{"issue":"12","key":"5091185_CR20","doi-asserted-by":"crossref","first-page":"1702","DOI":"10.1109\/43.811318","volume":"18","author":"I. Hong","year":"1999","unstructured":"Hong, I., D. Kirovski, G. Qu, M. Potkonjak, and M. B. Srivastava. Power Optimization of Variable-Voltage Core-Based Systems. IEEE Trans. Computer-Aided Design, vol. 18,no. 12, pp. 1702-1714, Dec. 1999.","journal-title":"IEEE Trans. Computer-Aided Design"},{"key":"5091185_CR21","unstructured":"Hou, J., and W. Wolf. Process Partitioning for Distributed Embedded Systems. In Proc. CODES, March 1996, pp. 70-76."},{"key":"5091185_CR22","doi-asserted-by":"crossref","unstructured":"Ishihara, T., and H. Yasuura. Voltage Scheduling Problem for Dynamically Variable Voltage Processors. In Proc. Int. Symp. Low Power Electronics and Design (ISLPED'98), 1998, pp. 197-202.","DOI":"10.1145\/280756.280894"},{"key":"5091185_CR23","doi-asserted-by":"crossref","unstructured":"Kalavade, A., and E. A. Lee. A Global Criticality\/Local Phase Driven Algorithm for the Constrained Hardware\/Software Partitioning Problem. In Proc. CODES, Sept. 1994, pp. 42-48.","DOI":"10.1109\/HSC.1994.336724"},{"key":"5091185_CR24","doi-asserted-by":"crossref","unstructured":"Kirovski, D., and M. Potkonjak. System-Level Synthesis of Low-Power Hard Real-Time Systems. In Proc. IEEE 34th Design Automation Conf. (DAC97), 1997, pp. 697-702.","DOI":"10.1145\/266021.266325"},{"key":"5091185_CR25","unstructured":"Klaiber, A. The Technology Behind Crusoe Processors. Transmeta, Jan. 2000."},{"issue":"9","key":"5091185_CR26","doi-asserted-by":"crossref","first-page":"1077","DOI":"10.1109\/43.775629","volume":"18","author":"P. V. Knudsen","year":"1999","unstructured":"Knudsen, P. V., and J. Madsen. Integrating Communication Protocol Selection with Hardware\/Software Codesign. IEEE Trans. Computer-Aided Design, vol. 18,no. 9, pp. 1077-1095, Aug. 1999.","journal-title":"IEEE Trans. Computer-Aided Design"},{"key":"5091185_CR27","doi-asserted-by":"crossref","unstructured":"Lee, S., and T. Sakurai. Run-Time Voltage Hopping for Low-Power Real-Time Systems. In Proc. IEEE 37th Design Automation Conf. (DA000), 2000, pp. 806-809.","DOI":"10.1145\/337292.337785"},{"key":"5091185_CR28","doi-asserted-by":"crossref","unstructured":"Li, Y.-T. S., S. Malik, and A. Wolfe. Performance Estimation of Embedded Software with Instruction Cache Modeling. In Proc. IEEE\/ACM Int. Conf. Computer-Aided Design (ICCAD-95), November 1995, pp. 380-387.","DOI":"10.1109\/ICCAD.1995.480144"},{"key":"5091185_CR29","unstructured":"Luo, J., and N. K. Jha. Power-Conscious Joint Scheduling of Periodic Task Graphs and Aperiodic Tasks in Distributed Real-Time Embedded Systems. In Proc. IEEE\/ACM Int. Conf. Computer-Aided Design (ICCAD-00), Nov. 2000, pp. 357-364."},{"key":"5091185_CR30","doi-asserted-by":"crossref","unstructured":"Luo, J., and N. K. Jha. Battery-Aware Static Scheduling for Distributed Real-Time Embedded Systems. In Proc. IEEE 38th Design Automation Conf. (DAC01), 2001, pp. 444-449.","DOI":"10.1145\/378239.378553"},{"key":"5091185_CR31","doi-asserted-by":"crossref","unstructured":"Michalewicz, Z. Genetic Algorithms + Data Structures = Evolution Programs. Springer Verlag, 1996.","DOI":"10.1007\/978-3-662-03315-9"},{"key":"5091185_CR32","doi-asserted-by":"crossref","unstructured":"Pering, T., T. D. Burd, and R. B. Brodersen. The Simulation and Evaluation for Dynamic Voltage Scaling Algorithms. In Proc. Int. Symp. Low Power Electronics and Design (ISLPED'98), August 1998, pp. 76-81.","DOI":"10.1145\/280756.280790"},{"key":"5091185_CR33","unstructured":"Pinedo, M. Scheduling: Theory, Algorithms and Systems. Prentice Hall, 1995."},{"key":"5091185_CR34","doi-asserted-by":"crossref","unstructured":"Prakash, S., and A. Parker. SOS:Synthesis of Application-Specific Heterogeneous Multiprocessor Systems. J. Parallel & Distributed Computing, Dec. 1992, pp. 338-351.","DOI":"10.1016\/0743-7315(92)90017-H"},{"key":"5091185_CR35","doi-asserted-by":"crossref","unstructured":"Schmitz, M. T., and B. M. Al-Hashimi. Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems. In Proc. Int. Symp. System Synthesis (ISSS'01), October 2001, pp. 250-255.","DOI":"10.1145\/500001.500060"},{"key":"5091185_CR36","unstructured":"Schmitz, M. T., B. M. Al-Hashimi, and P. Eles. Co-Synthesis with Energy Minimisation for Heterogeneous Distributed Systems containing Power Managed Processing Elements. Technical Report UOSTR-MTSO1, University of Southampton, UK, Department of Electronics and Computer Science, September 2001."},{"key":"5091185_CR37","unstructured":"Schmitz, M. T., B. M. Al-Hashimi, and P. Eles. Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems. In Proc. Design, Automation and Test in Europe Conf. (DATE2002), March 2002."},{"key":"5091185_CR38","doi-asserted-by":"crossref","unstructured":"Shin, Y., and K. Choi. Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems. In Proc. IEEE 36th Design Automation Conf. (DAC99), 1999, pp. 134-139.","DOI":"10.1145\/309847.309901"},{"issue":"2","key":"5091185_CR39","doi-asserted-by":"crossref","first-page":"175","DOI":"10.1109\/71.207593","volume":"4","author":"G. C. Sib","year":"1993","unstructured":"Sib, G. C., and E. A. Lee. A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures. IEEE Trans. Parallel and Distributed Systems, vol. 4,no. 2, pp. 175-187, February 1993.","journal-title":"IEEE Trans. Parallel and Distributed Systems"},{"key":"5091185_CR40","doi-asserted-by":"crossref","unstructured":"Tiwari, V., S. Malik, and A. Wolfe. Power Analysis of Embedded Software: A First Step Towards Software Power Minimization. IEEE Trans. VLSI Systems, Dec. 1994.","DOI":"10.1109\/92.335012"},{"key":"5091185_CR41","unstructured":"Weiser, M., B. Welch, A. Demers, and S. Shenker. Scheduling for Reduced CPU Energy. In Proc. USENIX Symposium on Operating Systems Design and Implementation (OSDI), 1994, pp. 13-23."},{"issue":"2","key":"5091185_CR42","doi-asserted-by":"crossref","first-page":"218","DOI":"10.1109\/92.585225","volume":"5","author":"W. H. Wolf","year":"1997","unstructured":"Wolf, W. H., An Architectural Co-Synthesis Algorithm for Distributed, Embedded Computing Systems. IEEE Trans. VLSI Systems, vol. 5,no. 2, pp. 218-229, June 1997.","journal-title":"IEEE Trans. VLSI Systems"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1016511712014.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1023\/A:1016511712014\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1016511712014.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,14]],"date-time":"2025-07-14T02:30:24Z","timestamp":1752460224000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1023\/A:1016511712014"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,7]]},"references-count":42,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2002,7]]}},"alternative-id":["5091185"],"URL":"https:\/\/doi.org\/10.1023\/a:1016511712014","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"type":"print","value":"0929-5585"},{"type":"electronic","value":"1572-8080"}],"subject":[],"published":{"date-parts":[[2002,7]]}}}