{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,15]],"date-time":"2025-07-15T00:02:55Z","timestamp":1752537775652,"version":"3.41.2"},"reference-count":23,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2002,11,1]],"date-time":"2002-11-01T00:00:00Z","timestamp":1036108800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2002,11,1]],"date-time":"2002-11-01T00:00:00Z","timestamp":1036108800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Design Automation for Embedded Systems"],"published-print":{"date-parts":[[2002,11]]},"DOI":"10.1023\/a:1020359206122","type":"journal-article","created":{"date-parts":[[2003,3,15]],"date-time":"2003-03-15T08:44:30Z","timestamp":1047717870000},"page":"325-339","source":"Crossref","is-referenced-by-count":28,"title":["Improving Software Performance with Configurable Logic"],"prefix":"10.1007","volume":"7","author":[{"given":"Jason","family":"Villarreal","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dinesh","family":"Suresh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Greg","family":"Stitt","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Frank","family":"Vahid","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Walid","family":"Najjar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"issue":"3","key":"5097375_CR1","doi-asserted-by":"crossref","first-page":"11","DOI":"10.1109\/2.204677","volume":"26","author":"P. Athanas","year":"1993","unstructured":"Athanas, P., and H. Silverman. Processor Reconfiguration Through Instruction-Set Metamorphosis. Computer, vol. 26 no.3, March 1993 pp. 11\u201318.","journal-title":"Computer"},{"key":"5097375_CR2","doi-asserted-by":"crossref","first-page":"117","DOI":"10.1023\/A:1013623303037","volume":"21","author":"W. Bohm","year":"2002","unstructured":"Bohm, W., J. Hammes, B. Draper, M. Chawathe, C. Ross, R. Rinker, and W. Najjar. Mapping a Single Assignment Programming Language to Reconfigurable Systems. Supercomputing, vol. 21, pp. 117\u2013130, 2002.","journal-title":"Supercomputing"},{"key":"5097375_CR3","unstructured":"Bohm, W., B. Draper, W. Najjar, J. Hammes, R. Rinker, M. Chawathe, and C. Ross. One-Step Compilation of Image Processing Applications to FPGAs. In IEEE Symposium on Field-Programmable Custom Computing Machines, Rohnert Park, CA, April 30-May 2, 2001."},{"key":"5097375_CR4","unstructured":"Burger, D., T. Austin and S. Bennett. Evaluating Future Microprocessors: The SimpleScalar ToolSet. University of Wisconsin-Madison, Computer Science Department, Technical Report CS-TR-1308, July 1996."},{"issue":"1","key":"5097375_CR5","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1023\/A:1008857008151","volume":"2","author":"P. Eles","year":"1997","unstructured":"Eles, P., Z. Peng, K. Kuchchinski, and A. Doboli. System Level Hardware\/Software Partitioning Based on Simulated Annealing and Tabu Search. Kluwer's Design Automation for Embedded Systems, vol. 2, no.1, pp. 5\u201332, Jan. 1997.","journal-title":"Kluwer's Design Automation for Embedded Systems"},{"key":"5097375_CR6","doi-asserted-by":"crossref","unstructured":"Givargis, T., F. Vahid, and J. Henkel. System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip. In International Conference on Computer-Aided Design (ICCAD), San Jose, Nov. 2001.","DOI":"10.1109\/TVLSI.2002.807764"},{"key":"5097375_CR7","unstructured":"Gokhale, M., and J. Stone. NAPA C: Compiling for Hybrid RISC\/FPGA Architectures. In IEEE Symposium on FPGAs for Custom Computing Machines, FCCM'98."},{"key":"5097375_CR8","doi-asserted-by":"crossref","unstructured":"Gonzalez, R. and R. E. Xtensa. A Configurable and Extensible Processor. IEEE Micro, pp. 60\u201370, 2000.","DOI":"10.1109\/40.848473"},{"key":"5097375_CR9","unstructured":"Grode, J., P. Knudsen, and J. Madsen. Hardware Resource Allocation for Hardware\/Software Partitioning in the LYCOS System. In Proc. of the 1998 Design Automation and Test in Europe."},{"key":"5097375_CR10","unstructured":"Hammes, J., W.Bohm, C. Ross, M. Chawathe, B. Draper, R. Rinker, and W. Najjar. Loop Fusion and Temporal Common Subexpression Elimination in Window-Based Loops. In IPDPS 8th Reconfigurable Architectures Workshop, San Francisco, CA, April 27, 2001."},{"key":"5097375_CR11","unstructured":"Hammes, J., R. Rinker, W. Najjar, and B. Draper. A High-Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems. In The 2nd International Workshop on the Engineering of Reconfigurable Hardware\/Software Objects (ENREGLE), part of the 2000 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), Las Vegas, NV, June 26\u201329, 2000."},{"key":"5097375_CR12","doi-asserted-by":"crossref","unstructured":"Hauser, J. and J. Wawrzynek. Garp: A MIPS Processor With a Reconfigurable Coprocessor. In IEEE Symposium on FPGAs for Custom Computing Machines, pages 12\u201321, Napa Valley, CA, April 1997.","DOI":"10.1109\/FPGA.1997.624600"},{"key":"5097375_CR13","doi-asserted-by":"crossref","unstructured":"Henkel, J., and Y. Li. Energy-Conscious HW\/SW-Partitioning of Embedded Systems: A Case Study on an MPEG-2 Encoder. In Proceedings of Sixth International Workshop on Hardware\/Software Codesign, March 1998, pp. 23\u201327.","DOI":"10.1145\/278241.278292"},{"key":"5097375_CR14","doi-asserted-by":"crossref","unstructured":"Henkel, J. A Low Power Hardware\/Software Partitioning Approach for Core-Based Embedded Systems. In Proceedings of the 36th ACM\/IEEE Conference on Design Automation Conference, pp. 122\u2013127, 1999.","DOI":"10.1145\/309847.309896"},{"issue":"2","key":"5097375_CR15","doi-asserted-by":"crossref","first-page":"125","DOI":"10.1023\/A:1008872518365","volume":"2","author":"A. Kalavade","year":"1997","unstructured":"Kalavade, A. and E. A. Lee. The Extended Partitioning Problem: Hardware\/Software Mapping, Scheduling and Implementation-Bin Selection. Kluwer Design Automation for Embedded Systems, vol. 2, no.2, pp. 125\u2013163, Mar. 1997.","journal-title":"Kluwer Design Automation for Embedded Systems"},{"key":"5097375_CR16","doi-asserted-by":"crossref","unstructured":"Kucukcakar, K. An ASIP Design Methodology for Embedded Systems. In International Symposium on Hardware\/Software Codesign, May 1999.","DOI":"10.1145\/301177.301190"},{"key":"5097375_CR17","unstructured":"Lee, C., M. Potkonjak, and W. H. Mangione-Smith. Media Bench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems, Proc. 30th Annual International Symposium on Microarchitecture, Dec.1997, pp. 330\u2013335."},{"key":"5097375_CR18","unstructured":"MIPS Technologies, Inc. http:\/\/www.mips.com."},{"key":"5097375_CR19","doi-asserted-by":"crossref","unstructured":"Schreiber, R. et al. High-Level Synthesis of Nonprogrammable Hardware Accelerators. In Proceedings of the International Conference on Application-Specific Systems, Architectures, and Processors, pp. 113\u2013124, July 2000.","DOI":"10.1109\/ASAP.2000.862383"},{"key":"5097375_CR20","unstructured":"Synplicity, www.synplicity.com\/products\/synplifypro.html."},{"key":"5097375_CR21","unstructured":"Triscend Corporation, http:\/\/www.triscend.com."},{"key":"5097375_CR22","unstructured":"Villarreal, J., R. Lysecky, S. Cotterell, and F. Vahid. Loop Analysis of Embedded Applications.UC Riverside Technical Report UCR-CSE-01-03, 2001."},{"key":"5097375_CR23","unstructured":"Virtex Power Estimator, http:\/\/support.xilinx.com\/cgi-bin\/powerweb.pl."}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1020359206122.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1023\/A:1020359206122\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1020359206122.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,14]],"date-time":"2025-07-14T02:43:24Z","timestamp":1752461004000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1023\/A:1020359206122"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,11]]},"references-count":23,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2002,11]]}},"alternative-id":["5097375"],"URL":"https:\/\/doi.org\/10.1023\/a:1020359206122","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"type":"print","value":"0929-5585"},{"type":"electronic","value":"1572-8080"}],"subject":[],"published":{"date-parts":[[2002,11]]}}}