{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,6]],"date-time":"2025-06-06T10:40:06Z","timestamp":1749206406858,"version":"3.41.0"},"reference-count":8,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2003,10,1]],"date-time":"2003-10-01T00:00:00Z","timestamp":1064966400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2003,10,1]],"date-time":"2003-10-01T00:00:00Z","timestamp":1064966400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Journal of Electronic Testing"],"published-print":{"date-parts":[[2003,10]]},"DOI":"10.1023\/a:1025130131636","type":"journal-article","created":{"date-parts":[[2003,9,16]],"date-time":"2003-09-16T22:25:03Z","timestamp":1063751103000},"page":"577-584","source":"Crossref","is-referenced-by-count":4,"title":["Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor"],"prefix":"10.1007","volume":"19","author":[{"given":"M.","family":"Rebaudengo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M. Sonza","family":"Reorda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Violante","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"5142583_CR1","doi-asserted-by":"crossref","unstructured":"P.L. Civera, L. Macchiarulo, M. Rebaudengo, M. Sonza Reorda, and M. Violante, \u201cFPGA-Based Fault Injection for Microprocessor Systems,\u201d in Proc. IEEE Asian Test Symposium, 2001, pp. 304-309.","DOI":"10.1109\/ATS.2001.990301"},{"issue":"3","key":"5142583_CR2","doi-asserted-by":"crossref","first-page":"560","DOI":"10.1109\/MDT.2002.1003798","volume":"19","author":"E. Dupont","year":"2002","unstructured":"E. Dupont, M. Nicolaidis, and P. Rohr, \u201cEmbedded Robustness IPs for Transient-Error-Free ICs,\u201d IEEE Design and Test of Computers, vol. 19, no. 3, pp. 560-570, 2002.","journal-title":"IEEE Design and Test of Computers"},{"key":"5142583_CR3","unstructured":"J. Gracia, J.C. Baraza, D. Gil, and P.J. Gil, \u201cA Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques,\u201d in Proc. IEEE International On-Line Testing Workshop, 2000, pp. 73-79."},{"key":"5142583_CR4","unstructured":"R.K. Iyer and D. Tang, \u201cExperimental Analysis of Computer System Dependability,\u201d Chapter 5 of Fault-Tolerant Computer System Design, D.K. Pradhan (Ed.), Prentice Hall, 1996."},{"key":"5142583_CR5","doi-asserted-by":"crossref","unstructured":"M. Nicolaidis, \u201cTime Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies,\u201d in Proc. IEEE 17th VLSI Test Symposium, April 1999, pp. 86-94.","DOI":"10.1109\/VTEST.1999.766651"},{"key":"5142583_CR6","doi-asserted-by":"crossref","unstructured":"B. Parrotta, M. Rebaudengo, M. Sonza Reorda, and M. Violante, \u201cNew Techniques for Accelerating Fault Injection in VHDL Descriptions,\u201d in Proc. IEEE International On-Line Test Workshop, 2000, pp. 61-66.","DOI":"10.1109\/OLT.2000.856613"},{"key":"5142583_CR7","doi-asserted-by":"crossref","unstructured":"M. Rebaudengo, M. Sonza Reorda, and M. Violante, \u201cAn Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor,\u201d in DATE2003: Design, Automation and Test in Europe, 2003, pp. 602-607.","DOI":"10.1109\/DATE.2003.1253674"},{"issue":"6","key":"5142583_CR8","doi-asserted-by":"crossref","first-page":"2405","DOI":"10.1109\/23.903784","volume":"47","author":"R. Velazco","year":"2000","unstructured":"R. Velazco, S. Rezgui, and R. Ecoffet, \u201cPredicting Error Rate for Microprocessor-Based Digital Architectures Through C.E.U. (Code Emulating Upsets) Injection,\u201d IEEE Transactions on Nuclear Science, vol. 47, no. 6, pp. 2405-2411, 2000.","journal-title":"IEEE Transactions on Nuclear Science"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1025130131636.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1023\/A:1025130131636\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1023\/A:1025130131636.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,6]],"date-time":"2025-06-06T10:10:52Z","timestamp":1749204652000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1023\/A:1025130131636"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003,10]]},"references-count":8,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2003,10]]}},"alternative-id":["5142583"],"URL":"https:\/\/doi.org\/10.1023\/a:1025130131636","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[2003,10]]}}}