{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,21]],"date-time":"2026-02-21T07:00:31Z","timestamp":1771657231339,"version":"3.50.1"},"reference-count":21,"publisher":"Institution of Engineering and Technology (IET)","issue":"1","license":[{"start":{"date-parts":[[2023,10,23]],"date-time":"2023-10-23T00:00:00Z","timestamp":1698019200000},"content-version":"vor","delay-in-days":295,"URL":"http:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":["ietresearch.onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["IET Circuits, Devices &amp; Systems"],"published-print":{"date-parts":[[2023,1]]},"abstract":"<jats:p>\n                    A feedback field effect transistor (FBFET) with p\u2010n\u2010p\u2010n structure benefits from a positive feedback mechanism. In this structure, the accumulated charges in its potential well and limitation of carrier flow by its internal potential barrier lead to superior electrical properties such as lower subthreshold swing (SS) and higher\n                    <jats:italic>I<\/jats:italic>\n                    <jats:sub>ON<\/jats:sub>\n                    \/\n                    <jats:italic>I<\/jats:italic>\n                    <jats:sub>OFF<\/jats:sub>\n                    ratio in comparison with FinFET. Thus, FBFET is a promising alternative for digital applications such as logic inverters. In this paper, binary and ternary logic inverters are designed by using FBFETs with 40\u2009nm channel length. The doping profile in the device plays an essential role and specifies the binary or ternary operation of the inverter. The inverter is analyzed by using a TCAD mixed\u2010mode simulator. The results indicate the high value of 10\n                    <jats:sup>10<\/jats:sup>\n                    for\n                    <jats:italic>I<\/jats:italic>\n                    <jats:sub>ON<\/jats:sub>\n                    \/\n                    <jats:italic>I<\/jats:italic>\n                    <jats:sub>OFF<\/jats:sub>\n                    ratio with an extremely low SS (1\u2009mV\/decade). The voltage transfer characteristics of the inverter and its dependence on doping levels have been investigated. Also, the electrical properties of this inverter are compared with previous inverter counterparts.\n                  <\/jats:p>","DOI":"10.1049\/2023\/8833764","type":"journal-article","created":{"date-parts":[[2023,10,24]],"date-time":"2023-10-24T06:12:01Z","timestamp":1698127921000},"update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Design of Binary and Ternary Logic Inverters Based on Silicon Feedback FETs Using TCAD Simulator"],"prefix":"10.1049","volume":"2023","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4187-8883","authenticated-orcid":false,"given":"Ashkan","family":"Horri","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"265","published-online":{"date-parts":[[2023,10,23]]},"reference":[{"key":"e_1_2_7_1_2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.1998.658762"},{"key":"e_1_2_7_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2007.901273"},{"key":"e_1_2_7_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2016.2619372"},{"key":"e_1_2_7_4_2","doi-asserted-by":"publisher","DOI":"10.1007\/s12633-021-01592-5"},{"key":"e_1_2_7_5_2","doi-asserted-by":"publisher","DOI":"10.1007\/s12633-022-01935-w"},{"key":"e_1_2_7_6_2","doi-asserted-by":"crossref","unstructured":"VermaS. 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Performance analysis of FinFET device using qualitative approach for low-power applications 2019 Devices for Integrated Circuit (DevIC) March 2019 Kalyani India IEEE 84\u201388 https:\/\/doi.org\/10.1109\/DEVIC.2019.8783754 2-s2.0-85070913720.","DOI":"10.1109\/DEVIC.2019.8783754"},{"key":"e_1_2_7_7_2","doi-asserted-by":"publisher","DOI":"10.1063\/1.4942217"},{"key":"e_1_2_7_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2017.2731401"},{"key":"e_1_2_7_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2012.6172808"},{"key":"e_1_2_7_10_2","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms8812"},{"key":"e_1_2_7_11_2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2773042"},{"key":"e_1_2_7_12_2","doi-asserted-by":"publisher","DOI":"10.1063\/1.4984145"},{"key":"e_1_2_7_13_2","doi-asserted-by":"publisher","DOI":"10.1063\/1.5130777"},{"key":"e_1_2_7_14_2","doi-asserted-by":"publisher","DOI":"10.1021\/nn500494a"},{"key":"e_1_2_7_15_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2012.05.061"},{"key":"e_1_2_7_16_2","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2017.2649548"},{"key":"e_1_2_7_17_2","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2009.2036845"},{"key":"e_1_2_7_18_2","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(83)90173-9"},{"key":"e_1_2_7_19_2","doi-asserted-by":"crossref","unstructured":"WangY.andZwolinskiM. Analytical transient response and propagation delay model for nanoscale CMOS inverter 2009 IEEE International Symposium on Circuits and Systems May 2009 Taipei Taiwan IEEE 2998\u20133001 https:\/\/doi.org\/10.1109\/ISCAS.2009.5118433 2-s2.0-70350155805.","DOI":"10.1109\/ISCAS.2009.5118433"},{"key":"e_1_2_7_20_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2016.07.008"},{"key":"e_1_2_7_21_2","doi-asserted-by":"crossref","unstructured":"ZamanS. S. KumarP. SarmaM. P. RayA. andTrivediG. Design and simulation of SF-FinFET and SD-FinFET and their performance in analog RF and digital applications 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) December 2017 Bhopal India IEEE 200\u2013205 https:\/\/doi.org\/10.1109\/iNIS.2017.49 2-s2.0-85052400975.","DOI":"10.1109\/iNIS.2017.49"}],"container-title":["IET Circuits, Devices &amp; Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/journals\/ietcds\/2023\/8833764.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ietcds\/2023\/8833764.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/ietresearch.onlinelibrary.wiley.com\/doi\/pdf\/10.1049\/2023\/8833764","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,5]],"date-time":"2025-11-05T17:06:54Z","timestamp":1762362414000},"score":1,"resource":{"primary":{"URL":"https:\/\/ietresearch.onlinelibrary.wiley.com\/doi\/10.1049\/2023\/8833764"}},"subtitle":[],"editor":[{"given":"Euclides Lourenco","family":"Chuma","sequence":"additional","affiliation":[],"role":[{"role":"editor","vocabulary":"crossref"}]}],"short-title":[],"issued":{"date-parts":[[2023,1]]},"references-count":21,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2023,1]]}},"alternative-id":["10.1049\/2023\/8833764"],"URL":"https:\/\/doi.org\/10.1049\/2023\/8833764","archive":["Portico"],"relation":{},"ISSN":["1751-858X","1751-8598"],"issn-type":[{"value":"1751-858X","type":"print"},{"value":"1751-8598","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,1]]},"assertion":[{"value":"2023-05-04","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2023-07-20","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2023-10-23","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}],"article-number":"8833764"}}