{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T15:57:15Z","timestamp":1761580635217,"version":"3.28.0"},"reference-count":19,"publisher":"Institution of Engineering and Technology (IET)","issue":"6","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IET Comput. Digit. Tech."],"published-print":{"date-parts":[[2008,11,3]]},"DOI":"10.1049\/iet-cdt:20050060","type":"journal-article","created":{"date-parts":[[2008,10,22]],"date-time":"2008-10-22T22:12:14Z","timestamp":1224713534000},"page":"483-492","source":"Crossref","is-referenced-by-count":7,"title":["Low-power and error protection coding for network-on-chip traffic"],"prefix":"10.1049","volume":"2","author":[{"given":"A.","family":"Vitkovski","sequence":"first","affiliation":[{"name":"Advanced Research Centre for Electronic Systems, University of Bologna, Viale Pepoli 3\/2, Bologna, 40123, Italy"}]},{"given":"A.","family":"Jantsch","sequence":"additional","affiliation":[{"name":"Department of Microelectronics and Information Technology, Royal Institute of Technology, Electrum 229, Kista, SE-164 40, Sweden"}]},{"given":"R.","family":"Lauter","sequence":"additional","affiliation":[{"name":"Department of Microelectronics and Information Technology, Royal Institute of Technology, Electrum 229, Kista, SE-164 40, Sweden"}]},{"given":"R.","family":"Haukilahti","sequence":"additional","affiliation":[{"name":"Department of Microelectronics and Information Technology, Royal Institute of Technology, Electrum 229, Kista, SE-164 40, Sweden"}]},{"given":"E.","family":"Nilsson","sequence":"additional","affiliation":[{"name":"Department of Microelectronics and Information Technology, Royal Institute of Technology, Electrum 229, Kista, SE-164 40, Sweden"}]}],"member":"265","reference":[{"key":"10.1049\/iet-cdt:20050060_r1","doi-asserted-by":"crossref","unstructured":"Jantsch, A., and Tenhunen, H.: \u2018Networks on chip\u2019, (Kluwer Academic Publishers 2003)","DOI":"10.1007\/b105353"},{"key":"10.1049\/iet-cdt:20050060_r2","first-page":"70","volume":"35","author":"Benini","year":"2002"},{"key":"10.1049\/iet-cdt:20050060_r3","unstructured":"Nilsson, E.: \u2018Design and implementation of a hot-potato switch in a network on chip\u2019, , Master, IMIT\/LECS 2002-11"},{"key":"10.1049\/iet-cdt:20050060_r4","first-page":"663","volume":"29","author":"Liu","year":"1994"},{"journal-title":"GLSVLSI'04","year":"2004","author":"Vellanki","key":"10.1049\/iet-cdt:20050060_r5"},{"journal-title":"CODES+ISSS'03","year":"2003","author":"Zimmer","key":"10.1049\/iet-cdt:20050060_r6"},{"journal-title":"Proc. IEEE Int. Symp. Circuits and Systems","year":"2005","author":"Jantsch","key":"10.1049\/iet-cdt:20050060_r7"},{"journal-title":"ISVLSI'02","year":"2002","author":"Kumar","key":"10.1049\/iet-cdt:20050060_r8"},{"key":"10.1049\/iet-cdt:20050060_r9","unstructured":"Pamunuwa, D.: \u2018Modelling and analysis of interconnects for deep submicron systems-on-chip\u2019, 2003, Doctoral, Royal Institute of Technology Stockholm, Sweden"},{"journal-title":"Hardware\/Software Codesign and System Synthesis, CODES+ISSS","year":"2004","author":"Nilsson","key":"10.1049\/iet-cdt:20050060_r10"},{"journal-title":"DAC 2003","year":"2003","author":"Raghunathan","key":"10.1049\/iet-cdt:20050060_r11"},{"key":"10.1049\/iet-cdt:20050060_r12","unstructured":"International Technology Roadmap for Semiconductors, 2003 Edn., http:\/\/public.itrs.net\/Files\/2003ITRS\/Home2003.htm"},{"key":"10.1049\/iet-cdt:20050060_r13","unstructured":"\u2018Leakage aware dynamic voltage scaling for real time embedded systems\u2019, CECS Technical, 03\u201335, November, 2003"},{"journal-title":"ISLPED'01","year":"2001","author":"Mamidipaka","key":"10.1049\/iet-cdt:20050060_r14"},{"issn-type":"print","year":"1998","author":"Benini","key":"10.1049\/iet-cdt:20050060_r15","ISSN":"http:\/\/id.crossref.org\/issn\/1063-8210"},{"key":"10.1049\/iet-cdt:20050060_r16","unstructured":"Wong, S.-K., and Tsui, C.-Y.: \u2018Re-configurable bus encoding scheme for reducing power consumption of the cross coupling capacitance for deep sub-micron instruction bus\u2019, (IEEE 2004)"},{"key":"10.1049\/iet-cdt:20050060_r17","unstructured":"Kretzschmar, C., Nieuwland, A.K., and Muller, D.: \u2018Why transition coding for power minimization of on-chip buses does not work\u2019, (IEEE 2004)"},{"journal-title":"DAC 2002","year":"2002","author":"Tao Ye","key":"10.1049\/iet-cdt:20050060_r18"},{"journal-title":"SBCCI 2000","author":"Siegmund","key":"10.1049\/iet-cdt:20050060_r19"}],"container-title":["IET Computers &amp; Digital Techniques"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/digital-library.theiet.org\/content\/journals\/10.1049\/iet-cdt_20050060?crawler=true&mimetype=application\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,12]],"date-time":"2024-11-12T14:38:12Z","timestamp":1731422292000},"score":1,"resource":{"primary":{"URL":"http:\/\/digital-library.theiet.org\/doi\/10.1049\/iet-cdt%3A20050060"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,11,3]]},"references-count":19,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2008,11,3]]}},"alternative-id":["10.1049\/iet-cdt:20050060"],"URL":"https:\/\/doi.org\/10.1049\/iet-cdt:20050060","relation":{},"ISSN":["1751-8601","1751-861X"],"issn-type":[{"type":"print","value":"1751-8601"},{"type":"electronic","value":"1751-861X"}],"subject":[],"published":{"date-parts":[[2008,11,3]]}}}