none 10.1049/iet-pel.2017.0418 Institution of Engineering and Technology (IET) Institution of Engineering and Technology (IET) 265 97048623 73448 2025102807374000723 10.1049 2025-10-28T22:47:44Z 2018-03-07T21:19:54Z 27 IET Power Electronics IET Power Electronics 1755-4535 1755-4543 08 2018 11 9 10.1049/pel2.v11.9 https://ietresearch.onlinelibrary.wiley.com/toc/17554543/11/9 Asma Alouane Laboratory LATIS National Engineering School of Sousse ENISO University of Sousse Erriadh 4023 Tunisia Asma Ben Rhouma Laboratory LATIS National Engineering School of Sousse ENISO University of Sousse Erriadh 4023 Tunisia Mahmoud Hamouda Laboratory LATIS National Engineering School of Sousse ENISO University of Sousse Erriadh 4023 Tunisia Adel Khedher Laboratory LATIS National Engineering School of Sousse ENISO University of Sousse Erriadh 4023 Tunisia This study proposes an efficient field programmable gate array (FPGA) implementation method of an enhanced space vector pulse width modulation (SVPWM) algorithm for a delta inverter. The overall hardware configuration of the FPGA is made graphically using the high‐level Xilinx system generator (XSG) programming tools. The proposed descriptive XSG model is first evaluated by running a hardware co‐simulation test. The comparative study with computer simulations performed with Simulink shows a good agreement between the results of both methods, which approves the accuracy of the proposed descriptive XSG model. Moreover, an experimental test is carried out on a laboratory prototype of the delta inverter feeding an induction machine. The obtained high quality of the load currents confirms the feasibility of the proposed enhanced SVPWM algorithm and the effectiveness of its implementation method on FPGA. 06 14 2018 08 2018 1611 1619 10.1049/iet-pel.2017.0418 2 10.1002/crossmark_policy ietresearch.onlinelibrary.wiley.com true 2017-06-10 2018-02-17 2018-06-14 http://onlinelibrary.wiley.com/termsAndConditions#vor 10.1049/iet-pel.2017.0418 https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/iet-pel.2017.0418 https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/iet-pel.2017.0418 https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-pel.2017.0418 https://onlinelibrary.wiley.com/doi/full-xml/10.1049/iet-pel.2017.0418 10.1109/TVT.2013.2246202 10.1109/EPE.2016.7695516 10.1049/ip-b.1980.0047 El.AntablyA.M. RhoumaA.B. andMasmoudiA.et al.: ‘Control device for driving a brushless dc motor’. Google Patents 2010. US Patent 7 643 733. Available athttps://www.google.com/patents/US7643733 IEE Proc. B Electr. Power Appl. Brooks D.M. 177 129 2 1982 Discussion on ‘delta inverter’ 10.1109/APEC.2014.6803467 10.1109/TVT.2010.2057268 10.1109/IAS.1991.178334 10.1109/IAS.1992.244431 10.1109/TII.2012.2222419 10.1049/iet-pel.2013.0078 10.1109/TIE.2011.2159952 10.1016/j.solener.2012.11.003 10.1049/iet-pel.2013.0603 IEEE Trans. Power Electron. Diao L. 1 99 2017 An efficient DSP‐FPGA‐based implementation of hybrid PWM for electric rail traction induction motor control 10.1109/TIE.2008.917159 10.1049/iet-pel.2014.0648 10.1016/j.ifacol.2015.11.325 10.1109/TPEL.2013.2253216 10.1016/j.renene.2015.04.013 10.1016/j.ijepes.2015.08.010 10.1016/j.vlsi.2016.09.003 10.1109/TMAG.2015.2413376 10.1109/TPEL.2010.2066577 10.1016/j.ifacol.2015.07.029 10.1049/iet-pel.2013.0736 10.1109/TNS.2015.2413673 10.1109/STA.2014.7086718 10.1109/TIE.2011.2173891