{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,23]],"date-time":"2026-10-23T13:38:24Z","timestamp":1792762704182,"version":"4.5.0"},"reference-count":37,"publisher":"AIP Publishing","issue":"10","funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["92565306"],"award-info":[{"award-number":["92565306"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["pubs.aip.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2026,10,1]]},"abstract":"<jats:p>Long-running quantum computations, including error-corrected workloads, place joint demands on instruction availability, measurement-dependent control, and calibration updates. We present time-deterministic and instruction-dynamic execution, a field-programmable gate array (FPGA) quantum-control processor supporting runtime revision at both instruction and parameter levels. Dynamic Instruction Parameter Update (DIPU) supplies one-shot, next-match patches before parameter capture, while Dynamic Instruction Stream Overwrite (DISO) provides guarded replacement, logical deletion, and out-of-line insertion in eligible future regions of a resident program. A moving fetch-visibility guard coordinates instruction updates with execution, and event commitment isolates complete descriptors for independent hardware-timed dispatch. Revision applicability depends on update timing and execution progress; deterministic service applies to committed events under the stated scheduling conditions. The Xilinx ZCU102 implementation uses a 250-MHz control core and a 425-MHz timing\/update domain. FPGA-resident measurements at the registered digital interfaces confirmed programmed-cycle dispatch for all tested descriptors committed at least one timing-domain cycle before their timestamps, with downstream ready and the stated first-in, first-out ordering conditions. Separate tests confirmed post-commit timestamp and payload invariance. The minimum all-success mapped DIPU margin was four control-domain cycles, and a replacement of L instruction words completed in L + 5 update-domain cycles under continuous payload delivery. Within the tested guard-distance range, rejected DISO requests reported an error and preserved the resident path, whereas all admitted revisions tested here executed complete revised sequences. These results provide a hardware execution basis for incorporating runtime-generated sequences and parameter corrections into precisely timed quantum computations with feedback.<\/jats:p>","DOI":"10.1063\/5.0356629","type":"journal-article","created":{"date-parts":[[2026,10,23]],"date-time":"2026-10-23T12:50:20Z","timestamp":1792759820000},"update-policy":"https:\/\/doi.org\/10.1063\/aip-crossmark-policy-page","source":"Crossref","is-referenced-by-count":0,"title":["Time-deterministic and instruction-dynamic execution: A field-programmable gate array quantum-control processor"],"prefix":"10.1063","volume":"97","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-0526-3343","authenticated-orcid":false,"given":"Xiaoqin","family":"Luo","sequence":"first","affiliation":[{"name":"Beijing Academy of Quantum Information Sciences 1 , Beijing 100193,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-0494-3179","authenticated-orcid":false,"given":"Jiayun","family":"Song","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Low Dimensional Quantum Physics, Tsinghua University 2 , Beijing 100084,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-9232-3757","authenticated-orcid":false,"given":"Xiaolu","family":"Su","sequence":"additional","affiliation":[{"name":"Beijing Academy of Quantum Information Sciences 1 , Beijing 100193,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"317","published-online":{"date-parts":[[2026,10,23]]},"reference":[{"key":"2026102308501720900_c1","doi-asserted-by":"publisher","first-page":"041058","DOI":"10.1103\/physrevx.11.041058","article-title":"Realization of real-time fault-tolerant quantum error correction","volume":"11","year":"2021","journal-title":"Phys. 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Quantum Eng."},{"key":"2026102308501720900_c37","doi-asserted-by":"publisher","first-page":"75","DOI":"10.1038\/s41586-024-08178-2","article-title":"Combining quantum processors with real-time classical communication","volume":"636","year":"2024","journal-title":"Nature"}],"container-title":["Review of Scientific Instruments"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/pubs.aip.org\/aip\/rsi\/article-pdf\/doi\/10.1063\/5.0356629\/21180249\/103204_1_5.0356629.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/pubs.aip.org\/aip\/rsi\/article-pdf\/doi\/10.1063\/5.0356629\/21180249\/103204_1_5.0356629.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,10,23]],"date-time":"2026-10-23T12:50:23Z","timestamp":1792759823000},"score":1,"resource":{"primary":{"URL":"https:\/\/pubs.aip.org\/rsi\/article\/97\/10\/103204\/3407248\/Time-deterministic-and-instruction-dynamic"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,10,1]]},"references-count":37,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2026,10,1]]}},"URL":"https:\/\/doi.org\/10.1063\/5.0356629","relation":{},"ISSN":["0034-6748","1089-7623"],"issn-type":[{"value":"0034-6748","type":"print"},{"value":"1089-7623","type":"electronic"}],"subject":[],"published-other":{"date-parts":[[2026,10]]},"published":{"date-parts":[[2026,10,1]]},"article-number":"103204"}}