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When subject to long-term gate bias stress, the TFTs show fast recovery of the threshold voltage (VT) when relaxed without annealing, suggesting that charge trapping at the interface and\/or in the bulk gate dielectric to be the dominant mechanism underlying VT instability. Device performance and stability make indium oxide TFTs promising for display applications.<\/jats:p>","DOI":"10.1063\/1.2825422","type":"journal-article","created":{"date-parts":[[2007,12,28]],"date-time":"2007-12-28T00:29:02Z","timestamp":1198801742000},"update-policy":"https:\/\/doi.org\/10.1063\/aip-crossmark-policy-page","source":"Crossref","is-referenced-by-count":104,"title":["Stable indium oxide thin-film transistors with fast threshold voltage recovery"],"prefix":"10.1063","volume":"91","author":[{"given":"Yuriy","family":"Vygranenko","sequence":"first","affiliation":[{"name":"ISEL Department of Electronics Telecommunications and Computer Engineering, , P-1949-014 Lisbon, Portugal"}]},{"given":"Kai","family":"Wang","sequence":"additional","affiliation":[{"name":"University of Waterloo Electrical and Computer Engineering, , Ontario N2L 3G1, Canada"}]},{"given":"Arokia","family":"Nathan","sequence":"additional","affiliation":[{"name":"University College London London Centre for Nanotechnology, , London WC1H 0AH, United Kingdom"}]}],"member":"317","published-online":{"date-parts":[[2007,12,27]]},"reference":[{"key":"2023070217201735500_c1","doi-asserted-by":"publisher","first-page":"1624","DOI":"10.1063\/1.1534627","volume":"93","year":"2003","journal-title":"J. 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