{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T06:03:58Z","timestamp":1757311438979},"reference-count":0,"publisher":"Wiley","issue":"4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2002,1]]},"abstract":"<jats:p>Two modern hyperbolic methods\u2014a second\u2010order Godunov method in the software package CLAWPACK and the second\u2010order Nessyahu\u2013Tadmor\u2013Kurganov (NTK) central scheme\u2014are compared for simulating an electron shock wave in the classical hydrodynamic model for semiconductor devices.<\/jats:p><jats:p>The NTK central scheme, which does not employ Riemann problem solutions, is described in detail. Special attention is paid in both methods to handling the source terms in the hydrodynamic model. CLAWPACK incorporates the source terms by a splitting method, while our version of the NTK scheme is unsplit.<\/jats:p>","DOI":"10.1080\/1065514021000012336","type":"journal-article","created":{"date-parts":[[2002,11,20]],"date-time":"2002-11-20T15:33:54Z","timestamp":1037806434000},"page":"721-728","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["A Comparison of Modern Hyperbolic Methods for Semiconductor Device Simulation: NTK Central Scheme Vs. CLAWPACK"],"prefix":"10.1155","volume":"15","author":[{"given":"Carl L.","family":"Gardner","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anne","family":"Gelb","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Justin","family":"Hernandez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2002,4]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2002\/480368.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1080\/1065514021000012336","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T03:07:48Z","timestamp":1723086468000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1080\/1065514021000012336"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,1]]},"references-count":0,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2002,1]]}},"alternative-id":["10.1080\/1065514021000012336"],"URL":"https:\/\/doi.org\/10.1080\/1065514021000012336","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[2002,1]]},"assertion":[{"value":"2001-05-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2002-04-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}