{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T12:59:07Z","timestamp":1740142747991,"version":"3.37.3"},"reference-count":32,"publisher":"Oxford University Press (OUP)","issue":"2","license":[{"start":{"date-parts":[[2020,12,14]],"date-time":"2020-12-14T00:00:00Z","timestamp":1607904000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/academic.oup.com\/journals\/pages\/open_access\/funder_policies\/chorus\/standard_publication_model"}],"funder":[{"name":"Key-Area Research and Development Program of Guangdong Province","award":["2020B010164002"],"award-info":[{"award-number":["2020B010164002"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61472153","61672513","61572377"],"award-info":[{"award-number":["61472153","61672513","61572377"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National Science Foundation of Hubei Province","award":["2015CFB192"],"award-info":[{"award-number":["2015CFB192"]}]},{"DOI":"10.13039\/501100012245","name":"Science and Technology Planning Project of Guangdong Province","doi-asserted-by":"publisher","award":["2019B010137002"],"award-info":[{"award-number":["2019B010137002"]}],"id":[{"id":"10.13039\/501100012245","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,2,19]]},"abstract":"<jats:title>Abstract<\/jats:title>\n               <jats:p>The write performance of multi-level cell (MLC) is several times slower than single-level cell (SLC); however, the cost per bit of MLC is much lower than SLC. Dual-mode flash (the medium can be partially switched to SLC mode by programming only 1 bit in some cells) can combine SLC and MLC to provide trading density opportunity for performance. In this paper, we present Hercules\u2014a hybrid storage system that couples dual-mode flash memory and hard drive disk (HDD)\u2014based on the content locality principle for high storage performance. The data are divided into two types: the reference data for read operation and the delta data for write operation. The reference data are stored in SLC and the delta data in MLC or HDD in sequential orders. Hercules organizes the metadata for the mapping of the physical locations of the reference blocks and the delta data of the original blocks, intelligently identifies hot\/cold data and performs the data migration between MLC and disk for performance improvements. To validate our findings, we implemented Hercules and made evaluation to show that Hercules can effectively improve the data access speed and reduce the response time, compared with the Flashcache storage structure, and in particular, with Hercules, we can achieve 10% performance improvement over the system in absence of hot delta data caching.<\/jats:p>","DOI":"10.1093\/comjnl\/bxaa149","type":"journal-article","created":{"date-parts":[[2020,10,13]],"date-time":"2020-10-13T11:38:13Z","timestamp":1602589093000},"page":"224-235","source":"Crossref","is-referenced-by-count":0,"title":["Hercules: Intelligent Coupling of Dual-Mode Flash Memory and Hard Disk Drive"],"prefix":"10.1093","volume":"64","author":[{"given":"Wen","family":"Cheng","sequence":"first","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074, China"}]},{"given":"Yuqi","family":"Zou","sequence":"additional","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074, China"}]},{"given":"Lingfang","family":"Zeng","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing System, Zhejiang Lab, Hangzhou 311121, China"}]},{"given":"Yang","family":"Wang","sequence":"additional","affiliation":[{"name":"Shenzhen Institutes of Advanced Technology, Chinese Academy of Sciences, Shenzhen 518055, China"}]}],"member":"286","published-online":{"date-parts":[[2020,12,14]]},"reference":[{"year":"2008","key":"2021021509575088100_ref1","article-title":"The DiskSim Simulation Environment Version 4.0 Reference Manual (CMU-PDL-08-101)"},{"year":"2017","key":"2021021509575088100_ref2","article-title":"FlashCache"},{"article-title":"Micron MT29FXXX08CXCAB 2D NAND Flash Memory","year":"2016","author":"Micron.","key":"2021021509575088100_ref3"},{"article-title":"Micron MT29FXXX08CXCBB 3D NAND Flash Memory","year":"2016","author":"Micron.","key":"2021021509575088100_ref4"},{"key":"2021021509575088100_ref5","first-page":"57","article-title":"Design Tradeoffs for SSD Performance","volume-title":"2008 USENIX Annual Technical Conference, USENIX ATC'14","author":"Agrawal","year":"2008"},{"volume-title":"IOmeter","year":"2014","author":"Allen","key":"2021021509575088100_ref6"},{"key":"2021021509575088100_ref7","doi-asserted-by":"crossref","DOI":"10.5121\/ijcseit.2014.4202","article-title":"A new multi-tiered solid state disk using SLC\/MLC combined flash memory","volume-title":"Int. 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