{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,25]],"date-time":"2026-10-25T00:36:38Z","timestamp":1792888598008,"version":"4.5.0"},"reference-count":43,"publisher":"Oxford University Press (OUP)","issue":"19","license":[{"start":{"date-parts":[[2026,5,19]],"date-time":"2026-05-19T00:00:00Z","timestamp":1779148800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"Henan Key Laboratory of Optoelectronic Circuit and Integration"},{"name":"Henan Shijia Photons Technology Co., Ltd."}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,10,5]]},"abstract":"<jats:title>ABSTRACT<\/jats:title>\n                  <jats:p>As artificial intelligence models continue to expand rapidly and evolve at an accelerating pace, the sustainability of scaling law faces challenges as computational resources cannot expand indefinitely. A more promising strategy is to use high-performance interconnections to compose multiple modest-capacity computing chips into a high-efficiency system, enabling comparable capability to that of much larger resource-intensive systems. However, an effective on-chip communication and network that provides high bandwidth, low latency, and large-scale parallelism to accelerate distributed computation is still lacking. Here, we address this challenge by proposing an on-chip, all-optical-interconnect-based hybrid optoelectronic distributed computing system, achieving two orders of magnitude lower inference latency than a single graphics processing unit while using only one-ninth of its computational resources. The 400-gigabits per second silicon photonic transceiver chips can provide high-speed and error-free optical input\/output for processing chips, and an ultra-low-loss ($\\le$5\u00a0dB at 1300\u00a0nm), non-blocking 16\u2009$\\times$\u200916 optical switch chip can further scale out the all-optical network for massive and flexible interconnection. As a validation, we configure the system to realize optical pipeline parallelism and execute a five-layer convolutional neural network denoising model, which processes a total of 1000 images of 32 768 bits each in only 105.16 \u03bcs. These results convincingly illustrate a transformative pathway toward future high-efficiency computing architectures.<\/jats:p>","DOI":"10.1093\/nsr\/nwag282","type":"journal-article","created":{"date-parts":[[2026,5,18]],"date-time":"2026-05-18T11:20:48Z","timestamp":1779103248000},"source":"Crossref","is-referenced-by-count":1,"title":["On-chip large-scale all-optical interconnect for ultra-low-latency deep neural network inference"],"prefix":"10.1093","volume":"13","author":[{"given":"Zihan","family":"Tao","sequence":"first","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1743-891X","authenticated-orcid":false,"given":"Yan","family":"Zhou","sequence":"additional","affiliation":[{"name":"Key Laboratory for Advanced Optoelectronic Integrated Chips of Jiangsu Province, Peking University Yangtze Delta Institute of Optoelectronics , Nantong 226010 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Weizhen","family":"Yu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Huajin","family":"Chang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hao","family":"Wu","sequence":"additional","affiliation":[{"name":"Key Laboratory for Advanced Optoelectronic Integrated Chips of Jiangsu Province, Peking University Yangtze Delta Institute of Optoelectronics , Nantong 226010 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ailian","family":"Cheng","sequence":"additional","affiliation":[{"name":"Hangzhou Flyslice Technologies Co., Ltd , Hangzhou 330113 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qian","family":"Hong","sequence":"additional","affiliation":[{"name":"Henan Key Laboratory of Optoelectronic Circuit and Integration, Henan Shijia Photons Technology Co., Ltd , Hebi 458000 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yonglin","family":"Tang","sequence":"additional","affiliation":[{"name":"Hangzhou Flyslice Technologies Co., Ltd , Hangzhou 330113 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaolin","family":"Bian","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lingwei","family":"Meng","sequence":"additional","affiliation":[{"name":"Key Laboratory for Advanced Optoelectronic Integrated Chips of Jiangsu Province, Peking University Yangtze Delta Institute of Optoelectronics , Nantong 226010 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Le","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Gaoang","family":"Shen","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Cheng","family":"Zhang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yongguang","family":"Huang","sequence":"additional","affiliation":[{"name":"Henan Key Laboratory of Optoelectronic Circuit and Integration, Henan Shijia Photons Technology Co., Ltd , Hebi 458000 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Wenhua","family":"Wang","sequence":"additional","affiliation":[{"name":"Hangzhou Flyslice Technologies Co., Ltd , Hangzhou 330113 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Haowen","family":"Shu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]},{"name":"Frontiers Science Center for Nano-optoelectronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xingjun","family":"Wang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Photonics and Communications, School of Electronics, Peking University , Beijing 100871 ,","place":["China"]},{"name":"Key Laboratory for Advanced Optoelectronic Integrated Chips of Jiangsu Province, Peking University Yangtze Delta Institute of Optoelectronics , Nantong 226010 ,","place":["China"]},{"name":"Frontiers Science Center for Nano-optoelectronics, Peking University , Beijing 100871 ,","place":["China"]}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"286","published-online":{"date-parts":[[2026,5,19]]},"reference":[{"key":"2026100511530587800_bib1","doi-asserted-by":"publisher","first-page":"106","DOI":"10.1145\/3744746","article-title":"A comprehensive overview of large language models","volume":"16","author":"Naveed","year":"2025","journal-title":"ACM Trans Intell Syst Technol"},{"key":"2026100511530587800_bib2","doi-asserted-by":"publisher","first-page":"10850","DOI":"10.1109\/TPAMI.2023.3261988","article-title":"Diffusion models in vision: A survey","volume":"45","author":"Croitoru","year":"2023","journal-title":"IEEE Trans Pattern Anal Mach Intell"},{"key":"2026100511530587800_bib3","doi-asserted-by":"publisher","first-page":"105","DOI":"10.1145\/3626235","article-title":"Diffusion models: A comprehensive survey of methods and applications","volume":"56","author":"Yang","year":"2023","journal-title":"ACM Comput Surv"},{"key":"2026100511530587800_bib4","doi-asserted-by":"publisher","first-page":"53","DOI":"10.1186\/s40537-021-00444-8","article-title":"Review of deep learning: concepts, cnn architectures, challenges, applications, future directions","volume":"8","author":"Alzubaidi","year":"2021","journal-title":"J Big Data"},{"key":"2026100511530587800_bib5","doi-asserted-by":"publisher","first-page":"341","DOI":"10.1609\/aies.v7i1.31641","article-title":"Scaling laws do not scale","volume-title":"Proceedings of the AAAI\/ACM Conference on AI, Ethics, and Society","author":"Diaz","year":"2024"},{"key":"2026100511530587800_bib6","doi-asserted-by":"publisher","first-page":"42","DOI":"10.1109\/MM.2021.3113475","article-title":"Evolution of the graphics processing unit (GPU)","volume":"41","author":"Dally","year":"2021","journal-title":"IEEE Micro"},{"key":"2026100511530587800_bib7","doi-asserted-by":"publisher","first-page":"e1494","DOI":"10.1002\/wcms.1494","article-title":"Terachem: A graphical processing unit-accelerated electronic structure package for large-scale ab initio molecular dynamics","volume":"11","author":"Seritan","year":"2021","journal-title":"WIREs Comput Mol Sci"},{"key":"2026100511530587800_bib8","first-page":"945","article-title":"MLaaS in the wild: Workload analysis and scheduling in large-scale heterogeneous GPU clusters","author":"Weng","year":"2022","journal-title":"19th USENIX Symposium on Networked Systems Design and Implementation"},{"key":"2026100511530587800_bib9","doi-asserted-by":"publisher","first-page":"633","DOI":"10.1038\/s41586-025-09422-z","article-title":"Deepseek-r1 incentivizes reasoning in llms through reinforcement learning","volume":"645","author":"Guo","year":"2025","journal-title":"Nature"},{"key":"2026100511530587800_bib10","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3579371.3589350","article-title":"TPU v4: An optically reconfigurable supercomputer for machine learning with hardware support for embeddings","volume-title":"Proceedings of the 50th Annual International Symposium on Computer Architecture","author":"Jouppi","year":"2023"},{"key":"2026100511530587800_bib11","doi-asserted-by":"publisher","first-page":"1859","DOI":"10.1007\/s00607-020-00900-y","article-title":"The evolution of distributed computing systems: from fundamental to new frontiers","volume":"103","author":"Lindsay","year":"2021","journal-title":"Computing"},{"key":"2026100511530587800_bib12","first-page":"1","volume-title":"Designing Distributed Systems: Patterns and Paradigms for Scalable, Reliable Systems using Kubernetes","author":"Burns","year":"2024"},{"key":"2026100511530587800_bib13","doi-asserted-by":"publisher","first-page":"1369","DOI":"10.3390\/electronics11091369","article-title":"A survey of high-performance interconnection networks in high-performance computer systems","volume":"11","author":"Lu","year":"2022","journal-title":"Electronics"},{"key":"2026100511530587800_bib14","doi-asserted-by":"publisher","first-page":"4","DOI":"10.1145\/1736065.1736069","article-title":"An analysis of on-chip interconnection networks for large-scale chip multiprocessors","volume":"7","author":"Sanchez","year":"2010","journal-title":"ACM Trans Archit Code Optim"},{"key":"2026100511530587800_bib15","doi-asserted-by":"publisher","first-page":"732","DOI":"10.1109\/COMST.2015.2481183","article-title":"Data center energy consumption modeling: A survey","volume":"18","author":"Dayarathna","year":"2015","journal-title":"IEEE Commun Surv Tutor"},{"key":"2026100511530587800_bib16","doi-asserted-by":"publisher","first-page":"246","DOI":"10.1016\/j.ijrefrig.2024.02.007","article-title":"Data centers cooling: A critical review of techniques, challenges, and energy saving solutions","volume":"160","author":"Alkrush","year":"2024","journal-title":"Int J Refrig"},{"key":"2026100511530587800_bib17","doi-asserted-by":"publisher","first-page":"11088","DOI":"10.1109\/JIOT.2021.3052082","article-title":"Resource provisioning in edge computing for latency-sensitive applications","volume":"8","author":"Abouaomar","year":"2021","journal-title":"IEEE Internet Things J"},{"key":"2026100511530587800_bib18","doi-asserted-by":"publisher","first-page":"5115889","DOI":"10.2139\/ssrn.5115889","article-title":"Ai clusters and elastic capacity management: Designing systems for diverse computational demands","author":"Vankayalapati","year":"2022"},{"key":"2026100511530587800_bib19","first-page":"5349","article-title":"RoCE network design for diverse AI workloads","volume-title":"IEEE International Conference on Communications (ICC)","author":"Maniotis","year":"2025"},{"key":"2026100511530587800_bib20","doi-asserted-by":"publisher","first-page":"52","DOI":"10.3390\/computation11030052","article-title":"Theoretical understanding of convolutional neural network: Concepts, architectures, applications, future directions","volume":"11","author":"Taye","year":"2023","journal-title":"Computation"},{"key":"2026100511530587800_bib21","doi-asserted-by":"publisher","first-page":"33","DOI":"10.1109\/MM.2024.3373763","article-title":"AI and memory wall","volume":"44","author":"Gholami","year":"2024","journal-title":"IEEE Micro"},{"key":"2026100511530587800_bib22","first-page":"86","article-title":"AdaPipe: optimizing pipeline parallelism with adaptive recomputation and partitioning","author":"Sun","year":"2024","journal-title":"Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems"},{"key":"2026100511530587800_bib23","article-title":"Zero bubble pipeline parallelism [preprint]","author":"Qi"},{"key":"2026100511530587800_bib24","first-page":"129","article-title":"On-chip optical interconnects","volume":"8","author":"Kobrinsky","year":"2004","journal-title":"Intel Technol J"},{"key":"2026100511530587800_bib25","doi-asserted-by":"publisher","first-page":"1186","DOI":"10.1109\/JPROC.2009.2020331","article-title":"On-chip optical interconnect","volume":"97","author":"Ohashi","year":"2009","journal-title":"Proc IEEE"},{"key":"2026100511530587800_bib26","doi-asserted-by":"publisher","first-page":"1699","DOI":"10.1109\/JSTQE.2006.880615","article-title":"On-chip optical interconnect roadmap: Challenges and critical directions","volume":"12","author":"Haurylau","year":"2007","journal-title":"IEEE J Sel Top Quantum Electron"},{"key":"2026100511530587800_bib27","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1007\/s12200-022-00055-y","article-title":"Co-packaged optics (CPO): status, challenges, and solutions","volume":"16","author":"Tan","year":"2023","journal-title":"Front Optoelectron"},{"key":"2026100511530587800_bib28","doi-asserted-by":"publisher","first-page":"852","DOI":"10.1109\/LPT.2021.3084945","article-title":"A chip-level optical interconnect for CPU","volume":"33","author":"Hao","year":"2021","journal-title":"IEEE Photon Technol Lett"},{"key":"2026100511530587800_bib29","first-page":"1","article-title":"Silicon photonic Mach\u2013Zehnder modulator driver for 800+ Gb\/s optical links","volume-title":"IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","author":"Sun"},{"key":"2026100511530587800_bib30","doi-asserted-by":"publisher","first-page":"857","DOI":"10.1109\/JLT.2020.3009952","article-title":"Silicon photonics for 100 Gbaud","volume":"39","author":"Zhou","year":"2021","journal-title":"J Lightwave Technol"},{"key":"2026100511530587800_bib31","doi-asserted-by":"publisher","first-page":"910","DOI":"10.1038\/s41928-023-01048-1","article-title":"An integrated CMOS\u2013silicon photonics transmitter with a 112 gigabaud transmission and picojoule per bit energy efficiency","volume":"6","author":"Li","year":"2023","journal-title":"Nat Electron"},{"key":"2026100511530587800_bib32","doi-asserted-by":"publisher","first-page":"2200117","DOI":"10.1002\/lpor.202200117","article-title":"High-speed photodetectors on silicon photonics platform for optical interconnect","volume":"16","author":"Chen","year":"2022","journal-title":"Laser Photon Rev"},{"key":"2026100511530587800_bib33","doi-asserted-by":"publisher","first-page":"6662","DOI":"10.1021\/acsphotonics.5c01684","article-title":"Large bandwidth and high power germanium\/silicon photodetector: A novel solution for 100 gb s${^{-1}}$ microwave photonic links","volume":"12","author":"Yan","year":"2025","journal-title":"ACS Photon"},{"key":"2026100511530587800_bib34","doi-asserted-by":"publisher","first-page":"216","DOI":"10.1109\/TNANO.2025.3558256","article-title":"On-chip non-blocking 4$\\times$4 and 8$\\times$8 photonic switches using MMI-MZI configuration for next-generation data center networks","volume":"24","author":"Chack","year":"2025","journal-title":"IEEE Trans Nanotechnol"},{"key":"2026100511530587800_bib35","doi-asserted-by":"publisher","first-page":"9295","DOI":"10.1364\/OE.24.009295","article-title":"16$\\times$16 non-blocking silicon optical switch based on electro-optic Mach\u2013Zehnder interferometers","volume":"24","author":"Lu","year":"2016","journal-title":"Opt Express"},{"key":"2026100511530587800_bib36","doi-asserted-by":"publisher","first-page":"2205","DOI":"10.1021\/acsphotonics.9b00819","article-title":"Miniature multilevel optical memristive switch using phase change material","volume":"6","author":"Zhang","year":"2019","journal-title":"ACS Photon"},{"key":"2026100511530587800_bib37","doi-asserted-by":"publisher","first-page":"2200571","DOI":"10.1002\/lpor.202200571","article-title":"A review of silicon-based integrated optical switches","volume":"17","author":"Chen","year":"2023","journal-title":"Laser Photon Rev"},{"key":"2026100511530587800_bib38","article-title":"8 Tbps co-packaged FPGA and silicon photonics optical I\/O","author":"Hosseini","year":"2021","journal-title":"Optical Fiber Communication Conference and Exhibition"},{"key":"2026100511530587800_bib39","first-page":"1","article-title":"A bandwidth-dense, low power electronic-photonic platform and architecture for multi-Tbps optical I\/O","author":"Wade","year":"2018","journal-title":"European Conference on Optical Communication"},{"key":"2026100511530587800_bib40","doi-asserted-by":"publisher","first-page":"42","DOI":"10.1109\/MCOM.1987.1093615","article-title":"Architectures for guided-wave optical space switching systems","volume":"25","author":"Spanke","year":"2003","journal-title":"IEEE Commun Mag"},{"key":"2026100511530587800_bib41","doi-asserted-by":"crossref","first-page":"141","DOI":"10.1117\/12.2608690","article-title":"Global insights into the co-packaged technology platforms enabling transceivers with capacities of 1.6 Tbps and higher","volume-title":"Metro and Data Center Optical Networks and Short-Reach Links V","author":"Vallo","year":"2022"},{"key":"2026100511530587800_bib42","first-page":"369","article-title":"A packaged 1.6 Tb\/s o-band optical transceiver based on the hybrid integration of SiGe electronics and InP-polymer photonics","volume-title":"European Conference on Optical Communication","author":"Andrianopoulos","year":"2024"},{"key":"2026100511530587800_bib43","doi-asserted-by":"publisher","first-page":"94","DOI":"10.1109\/TPDS.2019.2928289","article-title":"Evaluating modern GPU interconnect: PCIE, NVLink, NV-SLI, NVSwitch and GPUDirect","volume":"31","author":"Li","year":"2019","journal-title":"IEEE Trans Parallel Distrib Syst"}],"container-title":["National Science Review"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/academic.oup.com\/nsr\/advance-article-pdf\/doi\/10.1093\/nsr\/nwag282\/68341187\/nwag282.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"https:\/\/academic.oup.com\/nsr\/article-pdf\/13\/19\/nwag282\/68341187\/nwag282.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/academic.oup.com\/nsr\/article-pdf\/13\/19\/nwag282\/68341187\/nwag282.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,10,5]],"date-time":"2026-10-05T15:53:13Z","timestamp":1791215593000},"score":1,"resource":{"primary":{"URL":"https:\/\/academic.oup.com\/nsr\/article\/doi\/10.1093\/nsr\/nwag282\/8687745"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5,19]]},"references-count":43,"journal-issue":{"issue":"19","published-print":{"date-parts":[[2026,10,5]]}},"URL":"https:\/\/doi.org\/10.1093\/nsr\/nwag282","relation":{},"ISSN":["2095-5138","2053-714X"],"issn-type":[{"value":"2095-5138","type":"print"},{"value":"2053-714X","type":"electronic"}],"subject":[],"published-other":{"date-parts":[[2026,10]]},"published":{"date-parts":[[2026,5,19]]},"article-number":"nwag282"}}