{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T13:50:05Z","timestamp":1725630605872},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,9]]},"DOI":"10.1109\/3dic.2009.5306522","type":"proceedings-article","created":{"date-parts":[[2009,11,5]],"date-time":"2009-11-05T13:42:09Z","timestamp":1257428529000},"page":"1-6","source":"Crossref","is-referenced-by-count":7,"title":["Robust verification of 3D-ICs: Pros, cons and recommendations"],"prefix":"10.1109","author":[{"given":"Matthew","family":"Hogan","sequence":"first","affiliation":[]},{"given":"Dusan","family":"Petranovic","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2009.5074080"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2009.5074148"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2009.5074166"},{"key":"15","article-title":"through-silicon via based 3d ic technology: electrostatic simulations for design methodology","author":"rousseau","year":"2008","journal-title":"Proceedings IMAPS Device Packaging Conference"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2009.5073993"},{"key":"13","first-page":"847","article-title":"development and evaluation of 3-d sip with vertically interconnected trough silicon vias (tsv)","author":"yang","year":"2007","journal-title":"Proc IEEE Int Conf Electron Compon and Technol"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2008.4796763"},{"year":"0","key":"11"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/SPI.2009.5089840"},{"journal-title":"Materials for Advanced Packaging","year":"2008","author":"liu","key":"3"},{"year":"0","key":"2"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.1998.658762"},{"year":"0","key":"10"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2008.5388558"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/EPTC.2008.4763463"},{"journal-title":"Three-Dimensional Integrated Circuit Design","year":"2009","author":"pavlidis","key":"5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2008.5388564"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2008.5388565"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2008.5388567"}],"event":{"name":"2009 IEEE International Conference on 3D System Integration (3DIC)","start":{"date-parts":[[2009,9,28]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2009,9,30]]}},"container-title":["2009 IEEE International Conference on 3D System Integration"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5290624\/5306519\/05306522.pdf?arnumber=5306522","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T02:16:44Z","timestamp":1489803404000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5306522\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,9]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/3dic.2009.5306522","relation":{},"subject":[],"published":{"date-parts":[[2009,9]]}}}