{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T18:07:42Z","timestamp":1725473262207},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,9]]},"DOI":"10.1109\/3dic.2009.5306570","type":"proceedings-article","created":{"date-parts":[[2009,11,5]],"date-time":"2009-11-05T18:42:09Z","timestamp":1257446529000},"page":"1-7","source":"Crossref","is-referenced-by-count":1,"title":["Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers"],"prefix":"10.1109","author":[{"given":"John F.","family":"McDonald","sequence":"first","affiliation":[]},{"given":"Okan","family":"Erdogan","sequence":"additional","affiliation":[]},{"given":"Philip","family":"Jacobs","sequence":"additional","affiliation":[]},{"given":"Paul","family":"Belemjian","sequence":"additional","affiliation":[]},{"given":"Alexey","family":"Gutin","sequence":"additional","affiliation":[]},{"given":"Aamir","family":"Zia","sequence":"additional","affiliation":[]},{"given":"Michael","family":"Chu","sequence":"additional","affiliation":[]},{"given":"Jin Woo","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Ryan","family":"Clarke","sequence":"additional","affiliation":[]},{"given":"Nate","family":"DeSimone","sequence":"additional","affiliation":[]},{"given":"Sherry","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Russell P.","family":"Kraft","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"0","key":"3"},{"journal-title":"Fundamentals of Modern VLSI Devices Cambridge University Press 1998","year":"0","author":"taur","key":"2"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2007.4601901"},{"year":"0","key":"7"},{"year":"0","key":"6"},{"key":"5","first-page":"227","article-title":"device structures and bicmos integration","author":"harame","year":"2006","journal-title":"Silicon Heterostructure Handbook"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2005.852547"},{"key":"8","doi-asserted-by":"crossref","DOI":"10.1007\/1-4020-2888-1","author":"alioto","year":"2005","journal-title":"Model and Design of Bipolar and MOS Current-Mode Logic CML ECL and SCL Digital Circuits"}],"event":{"name":"2009 IEEE International Conference on 3D System Integration (3DIC)","start":{"date-parts":[[2009,9,28]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2009,9,30]]}},"container-title":["2009 IEEE International Conference on 3D System Integration"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5290624\/5306519\/05306570.pdf?arnumber=5306570","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,23]],"date-time":"2020-05-23T12:49:48Z","timestamp":1590238188000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5306570\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,9]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/3dic.2009.5306570","relation":{},"subject":[],"published":{"date-parts":[[2009,9]]}}}