{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T06:12:16Z","timestamp":1747807936729},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,11]]},"DOI":"10.1109\/3dic.2010.5751452","type":"proceedings-article","created":{"date-parts":[[2011,4,18]],"date-time":"2011-04-18T13:44:45Z","timestamp":1303134285000},"page":"1-5","source":"Crossref","is-referenced-by-count":5,"title":["CMIT — A novel cluster-based topology for 3D stacked architectures"],"prefix":"10.1109","author":[{"given":"Masoud","family":"Daneshtalab","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masoumeh","family":"Ebrahimi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pasi","family":"Liljeberg","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juha","family":"Plosila","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hannu","family":"Tenhunen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/981066.981091"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1148015.1148016"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.18"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.15"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306540"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893649"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796487"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2006.10"},{"key":"ref18","article-title":"3D Memory Organization and Performance Analysis for Multi-processor Network-On-Chip Architecture","author":"weldezion","year":"2009","journal-title":"Proc IEEE Int Conf on 3D System Integration (3D IC)"},{"journal-title":"Micron Technology Inc Micron 512Mb x4 x8 x16 DDR2 SDRAM Datasheet","year":"2006","key":"ref19"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"130","DOI":"10.1145\/1150019.1136497","article-title":"Design and Management of 3D Chip Multiprocessors Using Network-in-Memory","author":"li","year":"2006","journal-title":"33rd International Symposium on Computer Architecture"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250680"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.4108\/ICST.NANONET2007.2033"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457230"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2009.10.006"},{"key":"ref7","first-page":"114","article-title":"Scalability of the Network-on-Chip communication architecture for 3D meshes","author":"weldezion","year":"2009","journal-title":"Proc NOCS"},{"key":"ref2","first-page":"251","article-title":"MIRA: A Multi-Layered On-Chip Interconnect Router Architecture","author":"park","year":"0","journal-title":"ISCA 2008"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.142"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"581","DOI":"10.1145\/1629911.1630061","article-title":"exploring serial vertical interconnects for 3d ics","author":"pasricha","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISOC.2006.313226"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090700"}],"event":{"name":"2010 IEEE International 3D Systems Integration Conference (3DIC)","start":{"date-parts":[[2010,11,16]]},"location":"Munich, Germany","end":{"date-parts":[[2010,11,18]]}},"container-title":["2010 IEEE International 3D Systems Integration Conference (3DIC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5742028\/5751414\/05751452.pdf?arnumber=5751452","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T22:50:09Z","timestamp":1497912609000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5751452\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,11]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/3dic.2010.5751452","relation":{},"subject":[],"published":{"date-parts":[[2010,11]]}}}