{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T15:43:39Z","timestamp":1725637419817},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/3dic.2013.6702367","type":"proceedings-article","created":{"date-parts":[[2014,1,10]],"date-time":"2014-01-10T20:09:52Z","timestamp":1389384592000},"page":"1-5","source":"Crossref","is-referenced-by-count":5,"title":["Si interposer build-up options and impact on 3D system cost"],"prefix":"10.1109","author":[{"given":"Dimitrios","family":"Velenis","sequence":"first","affiliation":[]},{"given":"Mikael","family":"Detalle","sequence":"additional","affiliation":[]},{"given":"Erik Jan","family":"Marinissen","sequence":"additional","affiliation":[]},{"given":"Eric","family":"Beyne","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/ESTC.2012.6542130"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355573"},{"key":"11","article-title":"Fat damascene wires for high bandwidth routing in silicon interposer","author":"detalle","year":"0","journal-title":"International Conference on Solid State Devices and Materials 2012 25-27 September 2012"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2013.6575714"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.873612"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/IITC.2006.1648629"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2006.346786"},{"key":"7","first-page":"323","article-title":"Interposer technology for high bandwidth interconnect applications","author":"detalle","year":"2012","journal-title":"Electronic Components and Technology Conference 2012"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2012.6262977"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306575"},{"journal-title":"Three Dimensional Integrated Circuit Design","year":"2009","author":"pavlidis","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2010.5751428"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2012.6241775"}],"event":{"name":"2013 IEEE International 3D Systems Integration Conference (3DIC)","start":{"date-parts":[[2013,10,2]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2013,10,4]]}},"container-title":["2013 IEEE International 3D Systems Integration Conference (3DIC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6690582\/6702313\/06702367.pdf?arnumber=6702367","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T18:20:54Z","timestamp":1490206854000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6702367\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/3dic.2013.6702367","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}