{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T02:25:59Z","timestamp":1725416759986},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/3dic.2013.6702384","type":"proceedings-article","created":{"date-parts":[[2014,1,10]],"date-time":"2014-01-10T15:09:52Z","timestamp":1389366592000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Techniques for assigning inter-tier signals to bondpoints in a face-to-face bonded 3DIC"],"prefix":"10.1109","author":[{"given":"Gopi","family":"Neela","sequence":"first","affiliation":[]},{"given":"Jeffrey","family":"Draper","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Nangate 45nm open cell library","year":"0","key":"17"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2010.5751451"},{"key":"16","doi-asserted-by":"crossref","first-page":"316","DOI":"10.1109\/ICCD.2004.1347939","article-title":"3d processing technology and its impact on ia32 microprocessors","author":"black","year":"2004","journal-title":"Computer Design VLSI in Computers and Processors 2004 ICCD 2004 Proceedings IEEE International Conference on"},{"key":"13","doi-asserted-by":"crossref","first-page":"668","DOI":"10.1145\/1391469.1391642","article-title":"design and cad for 3d integrated circuits","author":"franzon","year":"2008","journal-title":"2008 45th ACM\/IEEE Design Automation Conference DAC"},{"key":"14","first-page":"103","article-title":"Architecting microprocessor components in 3d design space","author":"vaidyanathan","year":"2007","journal-title":"VLSI Design 2007 Held Jointly with 6th International Conference on Embedded Systems 20th International Conference on"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/2483028.2483107"},{"journal-title":"Design automation and analysis of three-dimensional integrated circuits","year":"2004","author":"das","key":"12"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.59"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.504.0491"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6571965"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2012.6292061"},{"key":"6","article-title":"Techniques for producing 3D ICs with high-density interconnect","author":"gupta","year":"0","journal-title":"Proceedings of the 21st International VLSI Multilevel Interconnection Conference 2004"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-0962-6_4"},{"journal-title":"3D-ICs and Integrated Circuit Security","year":"0","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2009.03.004"},{"journal-title":"The MOSIS Service Vendors Tezzaron TEZZ 2X GF 013 Tezzaron-Globalfoundries Two-Tier 130nm Fabrication Process","year":"0","key":"8"}],"event":{"name":"2013 IEEE International 3D Systems Integration Conference (3DIC)","start":{"date-parts":[[2013,10,2]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2013,10,4]]}},"container-title":["2013 IEEE International 3D Systems Integration Conference (3DIC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6690582\/6702313\/06702384.pdf?arnumber=6702384","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T01:51:13Z","timestamp":1498096273000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6702384\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/3dic.2013.6702384","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}