{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,8]],"date-time":"2025-05-08T18:22:03Z","timestamp":1746728523416},"reference-count":11,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[1998,6,1]],"date-time":"1998-06-01T00:00:00Z","timestamp":896659200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[1998,6]]},"DOI":"10.1109\/92.678867","type":"journal-article","created":{"date-parts":[[2002,8,24]],"date-time":"2002-08-24T19:45:59Z","timestamp":1030218359000},"page":"188-198","source":"Crossref","is-referenced-by-count":29,"title":["The Transmogrifier-2: a 1 million gate rapid-prototyping system"],"prefix":"10.1109","volume":"6","author":[{"given":"D.M.","family":"Lewis","sequence":"first","affiliation":[]},{"given":"D.R.","family":"Galloway","sequence":"additional","affiliation":[]},{"given":"M.","family":"Van Ierssel","sequence":"additional","affiliation":[]},{"given":"J.","family":"Rose","sequence":"additional","affiliation":[]},{"given":"P.","family":"Chow","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/92.486081"},{"key":"ref3","article-title":"the virtual wires emulation system: a gate-efficient asic prototyping environment","author":"tessier","year":"1994","journal-title":"Proc 2nd Annu Workshop FPGAs"},{"key":"ref10","first-page":"94","article-title":"the effect of fixed i\/o pin positioning on the routability and speed of fpga's","author":"khalid","year":"0","journal-title":"Proc Canadian Workshop Field-Programmable Devices FPD 95"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1995.477406"},{"key":"ref11","year":"1996","journal-title":"Altera Flex Logic Handbook"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"316","DOI":"10.1145\/140901.141896","article-title":"splash 2","author":"arnold","year":"1992","journal-title":"Proc 4th Annu ACM Symp Parallel Algorithms Arch"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1993.279468"},{"key":"ref7","article-title":"the transmogrifier: the university of toronto field-programmable system","author":"galloway","year":"1994","journal-title":"Proc Second Canadian Workshop Field-Programmable Devices"},{"key":"ref2","article-title":"a fast-fpga prototyping system that uses inexpensive high-performance fpic","author":"slimane-kadi","year":"1994","journal-title":"Proc 2nd Annu Workshop FPGAs"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1995.477419"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1992.276356"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx4\/92\/14940\/00678867.pdf?arnumber=678867","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,5]],"date-time":"2024-01-05T18:20:17Z","timestamp":1704478817000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/678867\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,6]]},"references-count":11,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/92.678867","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[1998,6]]}}}