{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,11]],"date-time":"2026-04-11T13:20:27Z","timestamp":1775913627257,"version":"3.50.1"},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,11,7]],"date-time":"2021-11-07T00:00:00Z","timestamp":1636243200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,11,7]],"date-time":"2021-11-07T00:00:00Z","timestamp":1636243200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,11,7]],"date-time":"2021-11-07T00:00:00Z","timestamp":1636243200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,11,7]]},"DOI":"10.1109\/a-sscc53895.2021.9634722","type":"proceedings-article","created":{"date-parts":[[2021,12,10]],"date-time":"2021-12-10T20:45:05Z","timestamp":1639169105000},"page":"1-2","source":"Crossref","is-referenced-by-count":7,"title":["A Hybrid ZQ Calibration Design for High-Density Flash Memory Toggle 5.0 High-speed Interface"],"prefix":"10.1109","author":[{"given":"Tongsung","family":"Kim","sequence":"first","affiliation":[]},{"given":"Anil","family":"Kavala","sequence":"additional","affiliation":[]},{"given":"Hyunsuk","family":"Kang","sequence":"additional","affiliation":[]},{"given":"Youngmin","family":"Jo","sequence":"additional","affiliation":[]},{"given":"Jungjune","family":"Park","sequence":"additional","affiliation":[]},{"given":"Kyoungtae","family":"Kang","sequence":"additional","affiliation":[]},{"given":"Byung-Kwan","family":"Chun","sequence":"additional","affiliation":[]},{"given":"Dong-Ho","family":"Shin","sequence":"additional","affiliation":[]},{"given":"Dong-Su","family":"Jang","sequence":"additional","affiliation":[]},{"given":"Byunghoon","family":"Jeong","sequence":"additional","affiliation":[]},{"given":"Chi-weon","family":"Yoon","sequence":"additional","affiliation":[]},{"given":"Jinyub","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Jai Hyuk","family":"Song","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870425"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2850937"},{"key":"ref6","first-page":"216","article-title":"A 512Gb 3-bit\/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB\/s Write Throughput and 1.2Gb\/s Interface","author":"kang","year":"2019","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9366054"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523166"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2353799"}],"event":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","location":"Busan, Korea, Republic of","start":{"date-parts":[[2021,11,7]]},"end":{"date-parts":[[2021,11,10]]}},"container-title":["2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9634699\/9634177\/09634722.pdf?arnumber=9634722","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:54:28Z","timestamp":1652201668000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9634722\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,7]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/a-sscc53895.2021.9634722","relation":{},"subject":[],"published":{"date-parts":[[2021,11,7]]}}}