{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T09:18:55Z","timestamp":1773825535449,"version":"3.50.1"},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,11,7]],"date-time":"2021-11-07T00:00:00Z","timestamp":1636243200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,11,7]],"date-time":"2021-11-07T00:00:00Z","timestamp":1636243200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,11,7]],"date-time":"2021-11-07T00:00:00Z","timestamp":1636243200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,11,7]]},"DOI":"10.1109\/a-sscc53895.2021.9634816","type":"proceedings-article","created":{"date-parts":[[2021,12,10]],"date-time":"2021-12-10T15:45:05Z","timestamp":1639151105000},"page":"1-3","source":"Crossref","is-referenced-by-count":4,"title":["A Single-Channel 1.75GS\/s, 6-Bit Flash-Assisted SAR ADC with Self-Adaptive Timer and On-Chip Offset Calibration"],"prefix":"10.1109","author":[{"given":"Yu-Sian","family":"Liao","sequence":"first","affiliation":[]},{"given":"Wei-Zen","family":"Chen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757479"},{"key":"ref3","first-page":"848","article-title":"A CMOS 6-Bit 16-GS\/s Time-Interleaved ADC Using Digital Background Calibration Techniques","volume":"46","author":"huang","year":"2011","journal-title":"IEEE JSSC"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2015.7387463"},{"key":"ref5","first-page":"365","article-title":"A 6 b 5 GS\/s 4 Interleaved 3 b\/Cycle SAR ADC","volume":"51","author":"chan","year":"2011","journal-title":"IEEE JSSC"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3039252"},{"key":"ref7","first-page":"288","article-title":"A 65-nm CMOS 6-bit 2.5-GS\/s 7.5-mW 8 × Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset Calibration","volume":"54","author":"oh","year":"2019","journal-title":"IEEE JSSC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433970"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063127"}],"event":{"name":"2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)","location":"Busan, Korea, Republic of","start":{"date-parts":[[2021,11,7]]},"end":{"date-parts":[[2021,11,10]]}},"container-title":["2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9634699\/9634177\/09634816.pdf?arnumber=9634816","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T12:54:28Z","timestamp":1652187268000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9634816\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,7]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/a-sscc53895.2021.9634816","relation":{},"subject":[],"published":{"date-parts":[[2021,11,7]]}}}