{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,7]],"date-time":"2026-04-07T00:29:52Z","timestamp":1775521792201,"version":"3.50.1"},"reference-count":56,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2014]]},"DOI":"10.1109\/access.2014.2304568","type":"journal-article","created":{"date-parts":[[2014,2,5]],"date-time":"2014-02-05T19:03:51Z","timestamp":1391627031000},"page":"104-115","source":"Crossref","is-referenced-by-count":76,"title":["Compact MOSFET Modeling for Process Variability-Aware VLSI Circuit Design"],"prefix":"10.1109","volume":"2","author":[{"given":"Samar K.","family":"Saha","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1996.554063"},{"key":"ref38","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-7091-9247-4","author":"arora","year":"1993","journal-title":"MOSFET Models for VLSI Circuit Simulation Theory and Practice"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2007.907190"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2008.4796607"},{"key":"ref31","first-page":"841","article-title":"Comparative evaluation of gap-fill dielectrics in shallow trench isolation for sub-0.25 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex><\/formula> technologies","author":"nag","year":"1996","journal-title":"Proc IEDM"},{"key":"ref30","doi-asserted-by":"crossref","first-page":"615401","DOI":"10.1117\/12.663289","article-title":"From optical proximity correction to lithography-driven physical design (1996?2006): 10 years of resolution enhancement technology and the roadmap enablers for the next decade","volume":"6154","author":"capodieci","year":"2006","journal-title":"Proc SPIE"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2006.1705271"},{"key":"ref36","first-page":"271","article-title":"Vth fluctuation induced by statistical variation of pocket dopant profile","author":"tanaka","year":"2000","journal-title":"Proc IEDM"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2022217"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2008.4796663"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.882412"},{"key":"ref27","first-page":"57","article-title":"Physical model of the impact of metal grain work function variability on emerging dual metal gate MOSFETs and its implication for SRAM reliability","author":"zhang","year":"2009","journal-title":"Proc IEEE IEDM"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2006.886711"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.748187"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2193129"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/16.333844"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2003.813457"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/16.735728"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/16.902724"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/55.924844"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2007.907802"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/16.974757"},{"key":"ref50","author":"saha","year":"2013","journal-title":"Technology Computer Aided Design Simulation for VLSI MOSFET"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(93)90051-Q"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2007.4339738"},{"key":"ref55","year":"2006","journal-title":"Simulation and Analysis User Guide"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1504\/IJEME.2010.036948"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/17.759152"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(94)90232-1"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1147\/rd.504.0433"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2008.2011845"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.880165"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1016\/S0038-1101(98)00183-X"},{"key":"ref13","first-page":"749","article-title":"Advanced channel engineering achieving aggressive reduction of VT variation for ultra-low-power applications","author":"fujita","year":"2011","journal-title":"Proc IEEE IEDM"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/66.806125"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"481","DOI":"10.1109\/43.372370","article-title":"Worst-case analysis and optimization of VLSI circuit performances","volume":"14","author":"kang","year":"1995","journal-title":"IEEE Trans Comput Aided Des Integr Circuits Syst"},{"key":"ref16","doi-asserted-by":"crossref","first-page":"1013","DOI":"10.1109\/TCAD.1987.1270342","article-title":"Statistical performance modeling and parametric yield estimation of MOS VLSI","volume":"6","author":"hajj","year":"1987","journal-title":"IEEE Trans Comput Aided Des"},{"key":"ref17","year":"2006","journal-title":"BSIM4 6 0 MOSFET Model?User's Manual"},{"key":"ref18","year":"2011","journal-title":"International Technology Roadmap for Semiconductors (ITRS)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/16.711362"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/S0038-1101(01)00197-6"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1116\/1.1420207"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1117\/12.485268"},{"key":"ref5","year":"2002","journal-title":"Transistors Having Optimized Source-Drain Structures and Methods for Making the Same"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2121913"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2157162"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.50"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2141140"},{"key":"ref46","author":"croon","year":"2005","journal-title":"Matching Properties of Deep Sub-Micron MOS Transistors"},{"key":"ref45","year":"2005","journal-title":"HiSIM2 Users Manual"},{"key":"ref48","author":"pelgrom","year":"2010","journal-title":"Compact Modeling Principles Techniques and Applications"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2003.1194758"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2004.826940"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2005.881006"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.44"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/6705689\/06732881.pdf?arnumber=6732881","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:28:40Z","timestamp":1642004920000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6732881\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"references-count":56,"URL":"https:\/\/doi.org\/10.1109\/access.2014.2304568","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014]]}}}