{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T09:30:57Z","timestamp":1648546257058},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"funder":[{"name":"Austrian COMET-K2 Program through the Linz Center of Mechatronics GmbH, Linz, Austria"},{"name":"Austrian Federal Government"},{"name":"Federal State of Upper Austria"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2014]]},"DOI":"10.1109\/access.2014.2345194","type":"journal-article","created":{"date-parts":[[2014,8,1]],"date-time":"2014-08-01T21:03:43Z","timestamp":1406927023000},"page":"771-787","source":"Crossref","is-referenced-by-count":4,"title":["A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers"],"prefix":"10.1109","volume":"2","author":[{"given":"Siegfried","family":"Brandstatter","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mario","family":"Huemer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","year":"2008"},{"key":"ref11","first-page":"18","article-title":"Architectures for mobile RF convergence and future RF transparency","author":"hooijmans","year":"2006","journal-title":"Proc RFDESIGN"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/22.981279"},{"key":"ref13","first-page":"217","article-title":"RFCMOS technology from 0.25 $\\mu$ m to 65 nm: The state of the art","author":"pekarik","year":"2004","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref14","first-page":"2","article-title":"New microarchitecture challenges in the coming generations of CMOS process technologies (keynote address)","author":"pollack","year":"1999","journal-title":"Proc 32nd Annu ACM\/IEEE Int Symp Microarchit (MICRO 32)"},{"key":"ref15","year":"2008","journal-title":"ARM"},{"key":"ref16","year":"2012","journal-title":"OpenRISC 1200 IP Core Specification (Preliminary Draft)"},{"key":"ref17","first-page":"45","article-title":"Verifying open source CPU cores using instruction set simulators in OVM environments","author":"ahmed","year":"2011","journal-title":"Proc Austrochip"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/5.259425"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICSCS.2008.4746904"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ECWT.2007.4403934"},{"key":"ref27","year":"2009","journal-title":"ARM Cortex-M0"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2012.6404159"},{"key":"ref6","first-page":"38","article-title":"The benefits of standard radio-to-baseband digital interfaces","volume":"2","author":"wilkins","year":"2003","journal-title":"High Freq Electron"},{"key":"ref5","year":"2011","journal-title":"Intel at Mobile World Congress 2011"},{"key":"ref8","year":"2008"},{"key":"ref7","year":"2004"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2011.6085111"},{"key":"ref9","year":"2006"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2010.5784667"},{"key":"ref20","year":"2005","journal-title":"A comparison of Network-on-Chip and Busses"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2009.5071465"},{"key":"ref21","first-page":"354","article-title":"MinRoot and CMesh: Interconnection architectures for network-on-chip systems","volume":"54","author":"jamali","year":"2009","journal-title":"World Acad Sci Eng Technol"},{"key":"ref24","author":"hennessy","year":"2007","journal-title":"Computer Architecture A Quantitative Approach"},{"key":"ref23","year":"2010","journal-title":"WISHBONE System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores (Revision B4)"},{"key":"ref26","first-page":"143","article-title":"Power optimierung auf entwurfsebene von einem 16-bit RISC-prozessor für mobile endgeräte","author":"guscheh","year":"2007","journal-title":"Proc Austrochip"},{"key":"ref25","year":"2012","journal-title":"MSP430 Ultra Low-power Microcontroller"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/iel7\/6287639\/6705689\/06870422.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/6705689\/06870422.pdf?arnumber=6870422","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:28:41Z","timestamp":1642004921000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6870422\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/access.2014.2345194","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014]]}}}