{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T22:59:33Z","timestamp":1767826773022,"version":"3.49.0"},"reference-count":56,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"funder":[{"DOI":"10.13039\/501100001665","name":"Agence Nationale de la Recherche","doi-asserted-by":"publisher","award":["ANR-15-CE25-0007-01"],"award-info":[{"award-number":["ANR-15-CE25-0007-01"]}],"id":[{"id":"10.13039\/501100001665","id-type":"DOI","asserted-by":"publisher"}]},{"name":"R&D ARPE-CONTINUUM Project"},{"name":"R\u00e9gion Occitanie, France"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2019]]},"DOI":"10.1109\/access.2019.2910932","type":"journal-article","created":{"date-parts":[[2019,4,24]],"date-time":"2019-04-24T19:58:40Z","timestamp":1556135920000},"page":"49474-49491","source":"Crossref","is-referenced-by-count":31,"title":["Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge Computing"],"prefix":"10.1109","volume":"7","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8326-3257","authenticated-orcid":false,"given":"Abdoulaye","family":"Gamatie","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guillaume","family":"Devic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gilles","family":"Sassatelli","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stefano","family":"Bernabovi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Philippe","family":"Naudin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael","family":"Chapman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2005.379"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2006.6"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750385"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.5573\/JSTS.2013.13.1.058"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3001936"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2747910"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.209"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2592798.2592824"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/2442116.2442121"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2015.7178127"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2008.4585930"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CODESISSS.2015.7331376"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2013.404"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2831347.2831354"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2015.2411227"},{"key":"ref20","year":"2017","journal-title":"Cortus SAS—Advanced Processing Solutions"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2002459"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2800728"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2003.1199165"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540713"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2013.6810241"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253185"},{"key":"ref50","article-title":"Performance optimization of memory-bound programs on data parallel accelerators","author":"mokhtari","year":"2016"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2018.8449378"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/TMSCS.2018.2791955"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.13"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333737"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/81.841927"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/1013235.1013249"},{"key":"ref10","author":"franklin","year":"2017","journal-title":"NVIDIA Jetson TX2 Delivers Twice the Intelligence to the Edge"},{"key":"ref11","author":"davies","year":"2018","journal-title":"Arm is changing machine learning experiences Project Trillium"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1115\/IMECE2015-50173"},{"key":"ref12","first-page":"14:1","article-title":"Emerging NVM: A survey on architectural integration and research challenges","volume":"23","author":"boukhobza","year":"2018","journal-title":"ACM Trans Design Autom Electr Syst"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310400"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/SmartCloud.2016.18"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.2"},{"key":"ref16","article-title":"Big.Little processing with ARM cortex-A15 & cortex-A7 - ARM White paper","author":"greenhalgh","year":"2011"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/2856125"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.adhoc.2012.02.016"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2717782"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2017.9"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.dcan.2017.07.001"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2017.2685434"},{"key":"ref5","author":"smith","year":"2018","journal-title":"Computing At the Edge of IoT"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2015.4"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCS.2018.00060"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2017.2750923"},{"key":"ref9","year":"2018","journal-title":"Samsung Optimizes Premium Exynos 9 Series 9810 for AI Applications and Richer Multimedia Content"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1142\/S0129626411000151"},{"key":"ref45","year":"2013","journal-title":"The openmp application program interface"},{"key":"ref48","first-page":"137","article-title":"The Malardalen WCET benchmarks—Past, present and future","author":"gustafsson","year":"2010","journal-title":"Proc Int Workshop Worst-Case Execution Time Anal"},{"key":"ref47","author":"nichols","year":"1996","journal-title":"Pthreads Programming"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/MCSoC.2016.20"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2018.2817923"},{"key":"ref44","year":"2019","journal-title":"List of ARM Microarchitectures"},{"key":"ref43","year":"2017","journal-title":"Genesys 2 Kintex-7 FPGA Development Board"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/8600701\/08689012.pdf?arnumber=8689012","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,8,10]],"date-time":"2021-08-10T19:40:37Z","timestamp":1628624437000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8689012\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"references-count":56,"URL":"https:\/\/doi.org\/10.1109\/access.2019.2910932","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019]]}}}