{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,25]],"date-time":"2025-10-25T19:09:46Z","timestamp":1761419386537,"version":"3.37.3"},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/501100003661","name":"Korea Institute for Advancement of Technology","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003661","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003621","name":"Ministry of Science, ICT and Future Planning","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003621","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2020]]},"DOI":"10.1109\/access.2020.2982180","type":"journal-article","created":{"date-parts":[[2020,3,24]],"date-time":"2020-03-24T22:31:36Z","timestamp":1585089096000},"page":"57722-57732","source":"Crossref","is-referenced-by-count":7,"title":["A Design of 6.8 mW All Digital Delay Locked Loop With Digitally Controlled Dither Cancellation for TDC in Ranging Sensor"],"prefix":"10.1109","volume":"8","author":[{"given":"Muhammad Riaz Ur","family":"Rehman","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arash","family":"Hejazi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Imran","family":"Ali","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jae Jin","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seong Jin","family":"Oh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Younggun","family":"Pu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9777-6953","authenticated-orcid":false,"given":"Kang-Yoon","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126615500012"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-018-1109-5"},{"key":"ref12","first-page":"1","article-title":"A digitally assisted 20 MHz–600 MHz 16-phase DLL enhanced with dynamic gain control loop","author":"hejazi","year":"2015","journal-title":"Proc Eur Conf Circuit Theory Design (ECCTD)"},{"key":"ref13","first-page":"112","article-title":"A 3.5 GHz 32 mW 150 nm multiphase clock generator for high-performance microprocessors","author":"alvandpour","year":"2003","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2020229"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.906183"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2423312"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2715899"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2018.2813531"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/4.881215"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2017.2777500"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2019.2930775"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2018.2852794"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2017.2777501"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.938373"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"401","DOI":"10.1109\/JSSC.2015.2496781","article-title":"A low-jitter and fractional-resolution injection-locked clock multiplier using a DLL-based real-time PVT calibrator with replica-delay cells","volume":"51","author":"kim","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2019.2924706"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2215800"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IS3C.2012.249"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2019.2933496"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2466443"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2369460"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.889381"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2010.2044663"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2048379"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2023945"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2180453"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/8948470\/09045937.pdf?arnumber=9045937","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T15:57:10Z","timestamp":1642003030000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9045937\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/access.2020.2982180","relation":{},"ISSN":["2169-3536"],"issn-type":[{"type":"electronic","value":"2169-3536"}],"subject":[],"published":{"date-parts":[[2020]]}}}