{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T20:19:26Z","timestamp":1740169166668,"version":"3.37.3"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61832007","61821003","61772222","U1705261"],"award-info":[{"award-number":["61832007","61821003","61772222","U1705261"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012226","name":"Fundamental Research Funds for the Central Universities","doi-asserted-by":"publisher","award":["2019kfyXMBZ037"],"award-info":[{"award-number":["2019kfyXMBZ037"]}],"id":[{"id":"10.13039\/501100012226","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National Science and Technology Major Project","award":["2017ZX01032-101"],"award-info":[{"award-number":["2017ZX01032-101"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2020]]},"DOI":"10.1109\/access.2020.2985291","type":"journal-article","created":{"date-parts":[[2020,4,2]],"date-time":"2020-04-02T21:14:38Z","timestamp":1585862078000},"page":"63239-63254","source":"Crossref","is-referenced-by-count":2,"title":["CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability"],"prefix":"10.1109","volume":"8","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5453-8661","authenticated-orcid":false,"given":"Hongwei","family":"Qin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4786-7440","authenticated-orcid":false,"given":"Yutong","family":"Zhao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dan","family":"Feng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jingning","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei","family":"Tong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2016.7897085"},{"key":"ref32","first-page":"1","article-title":"LaLDPC: Latency-aware LDPC for read performance improvement of solid state drives","author":"du","year":"2017","journal-title":"Proc 33rd Symp Mass Storage Syst Technol (MSST)"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858383"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2071990"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.115"},{"key":"ref10","first-page":"257","article-title":"FStream: Managing flash streams in the file system","author":"rho","year":"2018","journal-title":"Proc USENIX Conf File Storage Technol (FAST)"},{"key":"ref11","article-title":"Multi-stream write SSD","author":"choi","year":"2016","journal-title":"Flash Memory Summit"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2017.8240241"},{"key":"ref13","first-page":"18","article-title":"Exploiting memory device wear-out dynamics to improve NAND flash memory system performance","author":"pan","year":"2011","journal-title":"Proc USENIX Conf File and Storage Technologies (FAST)"},{"journal-title":"MLC 256Gb to 1Tb Async\/Sync NAND features","year":"2018","key":"ref14"},{"key":"ref15","first-page":"1013","article-title":"A Double-Leve1-Vth Select Gate Array Architecture for Multilevel NAND Flash Memories","volume":"79","author":"takeuchi","year":"1996","journal-title":"IEICE Trans Electron"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/4.475701"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.98"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2006.251188"},{"key":"ref19","first-page":"257","article-title":"Extending the lifetime of flash-based storage through reducing write amplification from file systems","author":"lu","year":"2013","journal-title":"Proc 11th USENIX Conf File Storage Technol (FAST)"},{"key":"ref28","first-page":"94","article-title":"Error correction for multi-level NAND flash memory using Reed&#x2013;Solomon codes","author":"chen","year":"2008","journal-title":"Proc IEEE Workshop Signal Process Syst"},{"key":"ref4","article-title":"Errors in flash-memory-based solid-state drives: Analysis, mitigation, and recovery","author":"cai","year":"2017","journal-title":"arXiv 1711 11427"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1989.48209"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657034"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2642055"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2015666"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2019.000-6"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2533861"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2013.12.004"},{"key":"ref2","first-page":"521","article-title":"Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis","author":"cai","year":"2012","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185341"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.61"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2637364.2591994"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3292040.3219659"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00050"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168954"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056062"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2015.7208284"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378623"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/8948470\/09055021.pdf?arnumber=9055021","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T15:56:17Z","timestamp":1642002977000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9055021\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020]]},"references-count":34,"URL":"https:\/\/doi.org\/10.1109\/access.2020.2985291","relation":{},"ISSN":["2169-3536"],"issn-type":[{"type":"electronic","value":"2169-3536"}],"subject":[],"published":{"date-parts":[[2020]]}}}