{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T20:22:18Z","timestamp":1740169338362,"version":"3.37.3"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2023]]},"DOI":"10.1109\/access.2023.3312637","type":"journal-article","created":{"date-parts":[[2023,9,6]],"date-time":"2023-09-06T17:31:38Z","timestamp":1694021498000},"page":"98016-98024","source":"Crossref","is-referenced-by-count":0,"title":["High Bandwidth and Highly Available Packet Buffer Design Using Multi-Retention Time MRAM"],"prefix":"10.1109","volume":"11","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4392-1603","authenticated-orcid":false,"given":"Yongwoon","family":"Song","sequence":"first","affiliation":[{"name":"Department of Computer Science and Engineering, Sogang University, Seoul, South Korea"}]},{"given":"Munhyung","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, Sogang University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2981-0800","authenticated-orcid":false,"given":"Hyukjun","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, Sogang University, Seoul, South Korea"}]}],"member":"263","reference":[{"key":"ref13","first-page":"1","article-title":"Commercialization of 1 Gb standalone spin-transfer torque MRAM","author":"sun","year":"2021","journal-title":"Proc IEEE Int Memory Workshop (IMW)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993516"},{"key":"ref15","article-title":"Survey on STT-MRAM testing: Failure mechanisms, fault models, and tests","author":"wu","year":"2020","journal-title":"arXiv 2001 05463"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838490"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2021.3116272"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.63"},{"key":"ref2","article-title":"High availability network fundamentals","author":"oggerino","year":"0","journal-title":"A Practical Guide to Modeling and Designing Reliable Networks"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2934872.2934891"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062955"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9372040"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3328520"},{"key":"ref18","first-page":"1","article-title":"Couture: Tailoring STT-MRAM for persistent main memory","author":"shihab","year":"2016","journal-title":"Proc 4th Workshop Interact NVM\/Flash Operating Syst Workloads (INFLOW)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358284"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9371922"},{"journal-title":"The Journal of Internet Test Methodologies","year":"2007","key":"ref26"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2011.4"},{"journal-title":"NCS 5500 Modular Platform Architecture","year":"2020","key":"ref20"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1587\/transele.2019ECS6003"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/LCN.2009.5355190"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317853"},{"journal-title":"CACTI 6 5","year":"2009","key":"ref29"},{"article-title":"A novel hybrid memory architecture for high-speed packet buffers in network nodes","year":"2012","author":"mutter","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.915367"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TNET.2008.923720"},{"journal-title":"Junos High Availability Best Practices for High Network Uptime (Animal Guide)","year":"2009","author":"sonderegger","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2018.2851244"},{"journal-title":"Cisco Network Convergence System 6008 Single-Chassis System Data Sheet","year":"2023","key":"ref6"},{"journal-title":"Measuring Latency in Equity Transactions","year":"2012","key":"ref5"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/10005208\/10242119.pdf?arnumber=10242119","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T17:46:40Z","timestamp":1694800000000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10242119\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/access.2023.3312637","relation":{},"ISSN":["2169-3536"],"issn-type":[{"type":"electronic","value":"2169-3536"}],"subject":[],"published":{"date-parts":[[2023]]}}}