{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T16:10:45Z","timestamp":1777651845674,"version":"3.51.4"},"reference-count":279,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2023]]},"DOI":"10.1109\/access.2023.3317884","type":"journal-article","created":{"date-parts":[[2023,9,21]],"date-time":"2023-09-21T17:46:18Z","timestamp":1695318378000},"page":"105843-105871","source":"Crossref","is-referenced-by-count":2,"title":["Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD"],"prefix":"10.1109","volume":"11","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1557-4819","authenticated-orcid":false,"given":"Geraldo F.","family":"Oliveira","sequence":"first","affiliation":[{"name":"ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9138-0613","authenticated-orcid":false,"given":"Saugata","family":"Ghose","sequence":"additional","affiliation":[{"name":"Department of Computer Science, University of Illinois Urbana-Champaign, Champaign, IL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juan","family":"G\u00f3mez-Luna","sequence":"additional","affiliation":[{"name":"ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amirali","family":"Boroumand","sequence":"additional","affiliation":[{"name":"Google, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexis","family":"Savery","sequence":"additional","affiliation":[{"name":"Google, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sonny","family":"Rao","sequence":"additional","affiliation":[{"name":"Rivos, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-4311-4394","authenticated-orcid":false,"given":"Salman","family":"Qazi","sequence":"additional","affiliation":[{"name":"Google, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gwendal","family":"Grignou","sequence":"additional","affiliation":[{"name":"Google, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rahul","family":"Thakur","sequence":"additional","affiliation":[{"name":"Google, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eric","family":"Shiu","sequence":"additional","affiliation":[{"name":"Rivos, Mountain View, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Onur","family":"Mutlu","sequence":"additional","affiliation":[{"name":"ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070050"},{"key":"ref207","year":"0","journal-title":"Perf Linux Profiling with Performance Counters"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"},{"key":"ref208","year":"0","journal-title":"YouTube"},{"key":"ref59","article-title":"A case for efficient hardware\/software cooperative management of storage and memory","author":"meza","year":"2013","journal-title":"Proc WEED"},{"key":"ref205","article-title":"MediaBench: A tool for evaluating and synthesizing multimedia and communications systems","author":"lee","year":"1997","journal-title":"Proc 30th Annu Int Symp MicroArchitecture"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378685"},{"key":"ref206","year":"0","journal-title":"The Chromium Projects"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.24"},{"key":"ref203","year":"0","journal-title":"Minecraft"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555760"},{"key":"ref204","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557176"},{"key":"ref201","year":"0","journal-title":"Telegram Messenger"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1145\/1785414.1785441"},{"key":"ref202","year":"0","journal-title":"Adobe Acrobat Reader 7"},{"key":"ref209","year":"0","journal-title":"Google Maps"},{"key":"ref210","year":"0","journal-title":"Google Sheets"},{"key":"ref211","year":"0","journal-title":"Google Docs"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"ref50","article-title":"Uncovering in-DRAM RowHammer protection mechanisms: A new methodology, custom RowHammer patterns, and implications","author":"hassan","year":"2021","journal-title":"Proc MICRO"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/1998582.1998590"},{"key":"ref218","year":"0","journal-title":"Mojo"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.57"},{"key":"ref219","year":"0","journal-title":"VaAPI"},{"key":"ref48","article-title":"Understanding RowHammer under reduced wordline voltage: An experimental study using real DRAM devices","author":"ya?l?k\u00e7?","year":"2022","journal-title":"Proc DSN"},{"key":"ref216","author":"grange","year":"0","journal-title":"VP9 Bitstream & Decoding Process Specification"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950392"},{"key":"ref217","year":"2021","journal-title":"HTML5 Living Standard"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3078505.3078590"},{"key":"ref214","year":"0","journal-title":"FFMPEG Documentation"},{"key":"ref41","article-title":"Understanding and improving the latency of DRAM-based memory systems","author":"chang","year":"2017"},{"key":"ref215","year":"0","journal-title":"webM"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835946"},{"key":"ref212","year":"0","journal-title":"Twitter"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/2896377.2901453"},{"key":"ref213","year":"0","journal-title":"Chromium Media"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480069"},{"key":"ref8","author":"dennard","year":"1968","journal-title":"Field-effect transistor memory"},{"key":"ref7","article-title":"As chromebook sales soar in schools, apple and Microsoft fight back","author":"heater","year":"2017","journal-title":"TechCrunch"},{"key":"ref9","article-title":"Memory systems","author":"kim","year":"2014","journal-title":"Computing Handbook Computer Science and Software Engineering"},{"key":"ref4","article-title":"Enabling the next mobile computing revolution with highly integrated ARMv8-A based SoCs","year":"2014","journal-title":"Arm Holdings plc and Qualcomm Incorporated"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.011441560"},{"key":"ref6","year":"2021","journal-title":"Chromebooks Lead PC Revival in Q1 2021 With 275% Growth"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446054"},{"key":"ref100","article-title":"Asynchronous I\/O stack: A low-latency kernel I\/O stack for ultra-low latency SSDs","author":"lee","year":"2019","journal-title":"Proc USENIX ATC"},{"key":"ref221","year":"0","journal-title":"V8 javascript engine"},{"key":"ref101","doi-asserted-by":"publisher","DOI":"10.1109\/PADSW.2018.8644859"},{"key":"ref222","year":"0","journal-title":"Taste"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3078505.3078533"},{"key":"ref220","year":"0","journal-title":"SkGifCodec"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1147\/rd.462.0187"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.58"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2016.30"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2591971.2592000"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00090"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485928"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080242"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337161"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056057"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3123945"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4939-2163-8_6"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00059"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2010.5703348"},{"key":"ref25","article-title":"Co-architecting controllers and DRAM to enhance DRAM process scaling","author":"kang","year":"2014","journal-title":"Memory Forum"},{"key":"ref20","first-page":"19","article-title":"Research problems and opportunities in memory systems","volume":"1","author":"mutlu","year":"2015","journal-title":"Supercomputing Frontiers and Innovations"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2915318"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665726"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927156"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750392"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3219617.3219661"},{"key":"ref200","year":"0","journal-title":"WhatsApp Messenger"},{"key":"ref128","article-title":"Optimizing memory-mapped I\/O for fast storage devices","author":"papagiannis","year":"2020","journal-title":"Proc USENIX ATC"},{"key":"ref249","year":"2009","journal-title":"Linux Kernel Documentation Queue sysfs Files"},{"key":"ref129","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS48437.2020.00034"},{"key":"ref97","year":"0","journal-title":"Intel Optane Memory H10 with Solid State Storage"},{"key":"ref126","doi-asserted-by":"publisher","DOI":"10.1145\/3340531.3412010"},{"key":"ref247","article-title":"When poll is better than interrupt","author":"yang","year":"2012","journal-title":"Proc FAST"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2012.2"},{"key":"ref127","article-title":"SplitKV: Splitting IO paths for different sized key-value items with advanced storage devices","author":"han","year":"2020","journal-title":"Proc HotStorage"},{"key":"ref248","article-title":"I\/O latency optimization with polling","author":"le moal","year":"2017","journal-title":"Proc Vault"},{"key":"ref99","doi-asserted-by":"publisher","DOI":"10.1145\/3329785.3329917"},{"key":"ref124","author":"mutlu","year":"2020","journal-title":"Lecture Notes for Computer Architecture&#x2014;Lecture 26 Flash Memory and Solid-State Drives"},{"key":"ref245","author":"axboe","year":"2016","journal-title":"MQ Deadline I\/O Scheduler"},{"key":"ref98","article-title":"Basic performance measurements of the Intel optane DC persistent memory module","author":"izraelevitz","year":"2019","journal-title":"arXiv 1903 05714"},{"key":"ref125","article-title":"LIRS: Enabling efficient machine learning on NVM-based storage via a lightweight implementation of random shuffling","author":"ke","year":"2018","journal-title":"arXiv 1810 04509"},{"key":"ref246","doi-asserted-by":"publisher","DOI":"10.1109\/90.649568"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1145\/3314221.3314650"},{"key":"ref133","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2711620"},{"key":"ref254","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2014.33"},{"key":"ref92","article-title":"The storage hierarchy is not a hierarchy: Optimizing caching on modern storage devices with orthus","author":"wu","year":"2021","journal-title":"Proc FAST"},{"key":"ref134","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2017.2713780"},{"key":"ref255","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2395415"},{"key":"ref95","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378661"},{"key":"ref131","doi-asserted-by":"publisher","DOI":"10.1145\/2656045.2656049"},{"key":"ref252","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228439"},{"key":"ref94","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2906597"},{"key":"ref132","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372637"},{"key":"ref253","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2511147"},{"key":"ref250","year":"0","journal-title":"Tuning the Performance of Intel Optane SSDs on Linux Operating Systems"},{"key":"ref130","article-title":"Towards an unwritten contract of Intel optane SSD","author":"wu","year":"2019","journal-title":"Proc HotStorage"},{"key":"ref251","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD50377.2020.00044"},{"key":"ref91","article-title":"Ultra-low latency SSDs&#x2019; impact on overall energy efficiency","author":"harris","year":"2020","journal-title":"Proc HotStorage"},{"key":"ref90","doi-asserted-by":"publisher","DOI":"10.1080\/00150199008008233"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609463"},{"key":"ref139","doi-asserted-by":"publisher","DOI":"10.1145\/3126509"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070830"},{"key":"ref137","doi-asserted-by":"publisher","DOI":"10.5573\/JSTS.2018.18.6.651"},{"key":"ref258","doi-asserted-by":"crossref","first-page":"1450","DOI":"10.1109\/TCAD.2014.2341922","article-title":"Application-specific wear leveling for extending lifetime of phase change memory in embedded systems","volume":"33","author":"liu","year":"2014","journal-title":"IEEE Trans Comput -Aided Design Integr Circuits Syst"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2009.5424242"},{"key":"ref138","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2627647"},{"key":"ref259","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749753"},{"key":"ref88","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2012.240"},{"key":"ref135","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2019.2937852"},{"key":"ref256","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2014.6780924"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2190369"},{"key":"ref136","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062317"},{"key":"ref257","article-title":"Energy- and endurance-aware design of phase change memory caches","author":"joo","year":"2010","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2010.2042041"},{"key":"ref144","year":"0","journal-title":"Chrome Browser"},{"key":"ref265","doi-asserted-by":"publisher","DOI":"10.1145\/3524059.3532378"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/7\/074003"},{"key":"ref145","year":"0","journal-title":"MemoryPressure Tast Test"},{"key":"ref266","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2151017"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609379"},{"key":"ref142","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2428692"},{"key":"ref263","article-title":"DC express: Shortest latency protocol for reading phase change memory over PCI express","author":"vu?ini?","year":"2014","journal-title":"Proc FAST"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1088\/0953-8984\/19\/16\/165209"},{"key":"ref143","article-title":"Acclaim: Adaptive memory reclaim to improve user experience in Android systems","author":"liang","year":"2020","journal-title":"Proc USENIX ATC"},{"key":"ref264","article-title":"FlashShare: Punching through server storage stack from kernel to firmware for ultra-low latency SSDs","author":"zhang","year":"2018","journal-title":"Proc OSDI"},{"key":"ref140","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2019.2942362"},{"key":"ref261","doi-asserted-by":"publisher","DOI":"10.1109\/BigComp48618.2020.00-48"},{"key":"ref141","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2992072"},{"key":"ref262","article-title":"OS I\/O path optimizations for flash solid-state drives","author":"shin","year":"2014","journal-title":"Proc USENIX ATC"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630086"},{"key":"ref260","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00093"},{"key":"ref79","article-title":"Techniques for data mapping and buffering to exploit asymmetry in multi-level cell (phase change) memory","author":"yoon","year":"2013"},{"key":"ref108","year":"0","journal-title":"World Leading DRAM and NAND Flash Market Research Firm With More Than a Decade of Most Authoritative Database"},{"key":"ref229","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2017.2689010"},{"key":"ref78","article-title":"Writeback-aware bandwidth partitioning for multi-core systems with PCM","author":"zhou","year":"2013","journal-title":"Proc Int l Conf Parallel Architectures and Compilation Techniques"},{"key":"ref109","doi-asserted-by":"publisher","DOI":"10.1145\/3357526.3357568"},{"key":"ref106","doi-asserted-by":"publisher","DOI":"10.1109\/NVMSA.2018.00021"},{"key":"ref227","article-title":"Monitoring virtual memory with vmstat","author":"tanaka","year":"2005","journal-title":"Linux J"},{"key":"ref107","year":"0","journal-title":"Intel Optane Memory Module 16 GB M 2 80 mm PCIe 3 0 20 nm 3D XPoint MEMPEK1W016GA"},{"key":"ref228","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2883981"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744841"},{"key":"ref104","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2731776"},{"key":"ref225","doi-asserted-by":"publisher","DOI":"10.1145\/2094091.2094104"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-017-01481-9"},{"key":"ref105","doi-asserted-by":"publisher","DOI":"10.1145\/3329785.3329916"},{"key":"ref226","article-title":"Efficient memory management on mobile devices","author":"zolnierkiewicz","year":"2013"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1145\/2086696.2086732"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.1109\/PDSW-DISCS.2018.00011"},{"key":"ref223","year":"0","journal-title":"chrome automation"},{"key":"ref76","article-title":"Accelerating write by exploiting PCM asymmetries","author":"yue","year":"2013","journal-title":"Proc IEEE 19th Int Symp High Perform Comput Archit (HPCA)"},{"key":"ref103","doi-asserted-by":"publisher","DOI":"10.1145\/3372783"},{"key":"ref224","article-title":"Intel 3D XPoint memory die removed from Intel optane PCM (phase change memory)","author":"choe","year":"2017"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155658"},{"key":"ref111","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2015.58"},{"key":"ref232","doi-asserted-by":"publisher","DOI":"10.1145\/2905364"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1145\/2967938.2967953"},{"key":"ref112","article-title":"NVMOVE: Helping programmers move to byte-based persistence","author":"chauhan","year":"2016","journal-title":"Proc INFLOW"},{"key":"ref233","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2627667"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815981"},{"key":"ref230","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898087"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416645"},{"key":"ref110","article-title":"Prototyping byte-addressable NVM access","author":"metzler","year":"2015","journal-title":"Proc OpenFabrics Developers Workshop"},{"key":"ref231","year":"0","journal-title":"Intel Optane Memory"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.10"},{"key":"ref119","doi-asserted-by":"publisher","DOI":"10.1145\/3219617.3219659"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5456923"},{"key":"ref117","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3196085"},{"key":"ref238","year":"2020","journal-title":"Disk Prices (U S )"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1145\/2459316.2459318"},{"key":"ref118","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2713127"},{"key":"ref239","article-title":"The new Linux &#x2018;perf&#x2019; tools","author":"de melo","year":"2010","journal-title":"Proc Linux Kongress"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2011.5762715"},{"key":"ref115","doi-asserted-by":"publisher","DOI":"10.1145\/3447786.3456237"},{"key":"ref236","year":"0","journal-title":"SLC NAND"},{"key":"ref63","article-title":"PCM applications and an outlook to the future","author":"atwood","year":"2017","journal-title":"Phase Change Memory Device Physics Reliability and Applications"},{"key":"ref116","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00043"},{"key":"ref237","author":"handy","year":"0","journal-title":"Examining 3D XPoint&#x2019;s 1 000 Times Endurance Benefit&#x2014;The Memory Guy"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485959"},{"key":"ref113","doi-asserted-by":"publisher","DOI":"10.1145\/2669365"},{"key":"ref234","author":"hady","year":"2023","journal-title":"Intel Optane Technology Delivers New Levels of Endurance"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0449"},{"key":"ref114","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTER.2017.130"},{"key":"ref235","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1145\/3381898.3397210"},{"key":"ref122","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2016.2603608"},{"key":"ref243","article-title":"Blktrace user guide","author":"brunelle","year":"2007"},{"key":"ref123","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.49"},{"key":"ref244","author":"sandoval","year":"2017","journal-title":"Kyber MQ I\/O Scheduler"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1145\/3358180"},{"key":"ref120","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00050"},{"key":"ref241","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00041"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1145\/3394885.3431529"},{"key":"ref121","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.61"},{"key":"ref242","article-title":"MQSim: A framework for enabling realistic studies of modern multi-queue SSD devices","author":"tavakkol","year":"2018","journal-title":"Proc FAST"},{"key":"ref240","doi-asserted-by":"publisher","DOI":"10.1145\/2485732.2485740"},{"key":"ref168","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00052"},{"key":"ref169","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref170","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms15199"},{"key":"ref177","doi-asserted-by":"publisher","DOI":"10.1016\/S0026-2714(01)00049-X"},{"key":"ref178","article-title":"3D XPoint status and forecast","author":"webb","year":"2016","journal-title":"Proc Flash Memory Summit"},{"key":"ref175","doi-asserted-by":"publisher","DOI":"10.1126\/science.246.4936.1400"},{"key":"ref176","doi-asserted-by":"publisher","DOI":"10.1126\/science.1129564"},{"key":"ref173","doi-asserted-by":"publisher","DOI":"10.1186\/s11671-015-0880-9"},{"key":"ref174","doi-asserted-by":"publisher","DOI":"10.1039\/D0NR01671C"},{"key":"ref171","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref172","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2010.11.024"},{"key":"ref179","article-title":"Intel launches optane DIMMs up to 512 GB: Apache pass is here!","author":"cutress","year":"2016","journal-title":"AnandTech"},{"key":"ref180","year":"2019","journal-title":"PCI Express Base Specification Revision 5 0 Version 1 0"},{"key":"ref181","doi-asserted-by":"publisher","DOI":"10.1145\/3357526.3357541"},{"key":"ref188","doi-asserted-by":"publisher","DOI":"10.14778\/3551793.3551807"},{"key":"ref189","doi-asserted-by":"publisher","DOI":"10.1145\/3492321.3519556"},{"key":"ref186","doi-asserted-by":"publisher","DOI":"10.1109\/MCHPC49590.2019.00008"},{"key":"ref187","article-title":"An empirical guide to the behavior and use of scalable persistent memory","author":"yang","year":"2020","journal-title":"Proc FAST"},{"key":"ref184","article-title":"An early evaluation of Intel&#x2019;s optane DC persistent memory module and its impact on high-performance scientific applications","author":"weiland","year":"2019","journal-title":"Proc SC"},{"key":"ref185","doi-asserted-by":"publisher","DOI":"10.1145\/3399666.3399933"},{"key":"ref182","article-title":"Single machine graph analytics on massive datasets using Intel optane DC persistent memory","author":"gill","year":"2019","journal-title":"arXiv 1904 07162"},{"key":"ref183","doi-asserted-by":"publisher","DOI":"10.1145\/3399666.3399898"},{"key":"ref148","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2014.6844460"},{"key":"ref269","doi-asserted-by":"publisher","DOI":"10.1109\/CloudCom.2017.14"},{"key":"ref149","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2013.6704679"},{"key":"ref146","year":"2018","journal-title":"Intel optane ssd 9 series"},{"key":"ref267","article-title":"NVMeDirect: A user-space I\/O framework for application-specific optimization on NVMe SSDs","author":"kim","year":"2016","journal-title":"Proc HotStorage"},{"key":"ref147","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2011.6114205"},{"key":"ref268","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4842-4932-1_5"},{"key":"ref155","article-title":"The security architecture of the chromium browser","author":"barth","year":"2008"},{"key":"ref276","doi-asserted-by":"publisher","DOI":"10.1145\/3470496.3527442"},{"key":"ref156","year":"0","journal-title":"HTTP Archive"},{"key":"ref277","doi-asserted-by":"publisher","DOI":"10.14778\/2824032.2824044"},{"key":"ref153","year":"0","journal-title":"Skia Graphics Library"},{"key":"ref274","article-title":"Early evaluation of Intel optane non-volatile memory with HPC I\/O workloads","author":"wu","year":"2017","journal-title":"in arXiv 1708 02199"},{"key":"ref154","doi-asserted-by":"publisher","DOI":"10.1145\/1519065.1519090"},{"key":"ref275","doi-asserted-by":"publisher","DOI":"10.1109\/NAS51552.2021.9605438"},{"key":"ref151","year":"0","journal-title":"Market Share Statistics for Internet Technologies"},{"key":"ref272","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2017.014709"},{"key":"ref152","year":"0","journal-title":"Blink Rendering Engine"},{"key":"ref273","doi-asserted-by":"publisher","DOI":"10.1145\/3132747.3132770"},{"key":"ref270","year":"0","journal-title":"Open Memory Platform Development Kit User Level NVMe Driver"},{"key":"ref150","author":"popper","year":"2017","journal-title":"Google announces over 2 billion monthly active devices on android"},{"key":"ref271","doi-asserted-by":"publisher","DOI":"10.1145\/2812806"},{"key":"ref159","year":"0","journal-title":"Pixel Smartphones"},{"key":"ref157","article-title":"OOM killer rewrite; when the kernel runs out of memory","author":"rientjes","year":"2010"},{"key":"ref278","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2022.102547"},{"key":"ref158","author":"collins","year":"2011","journal-title":"Android in Practice"},{"key":"ref279","doi-asserted-by":"publisher","DOI":"10.1145\/3477132.3483550"},{"key":"ref166","author":"lohr","year":"2012","journal-title":"For impatient web users an eye blink is just too long to wait"},{"key":"ref167","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref164","year":"2016","journal-title":"Memory Coordinator"},{"key":"ref165","article-title":"High performance networking in chrome","author":"grigorik","year":"2013","journal-title":"Perform Open Source Appl Speed Precis Bit Serendipity"},{"key":"ref162","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2017.7939078"},{"key":"ref163","first-page":"172","article-title":"Linearly Compressed Pages: A Low-Complexity, Low-Latency Main Memory Compression Framework","author":"gennady pekhimenko","year":"2013","journal-title":"2013 46th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO)"},{"key":"ref160","article-title":"Transparent memory compression in Linux","author":"jennings","year":"2013","journal-title":"Linux"},{"key":"ref161","article-title":"System challenges and hardware requirements for future consumer devices: From wearable to ChromeBooks and devices in-between","author":"shiu","year":"2015","journal-title":"Proc Symp VLSI Technol (VLSI Technol )"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00046"},{"key":"ref12","author":"mutlu","year":"2020","journal-title":"Lecture Notes for Digital Design and Computer Architecture&#x2014;Lecture 23b Virtual Memory"},{"key":"ref15","article-title":"Storage on your smartphone uses more energy than you think","author":"mohan","year":"2017","journal-title":"Proc HotStorage"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173177"},{"key":"ref11","author":"tanenbaum","year":"1997","journal-title":"Operating Systems Design and Implementation"},{"key":"ref10","author":"bovet","year":"2005","journal-title":"Understanding the Linux Kernel From I\/O Ports to Process Management"},{"key":"ref17","author":"nelson","year":"2017","journal-title":"The Size of iPhone&#x2019;s Top Apps Has Increased by 1 000% in Four Years"},{"key":"ref16","article-title":"Practical mechanisms for reducing processor-memory data movement in modern workloads","author":"boroumand","year":"2020"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2013.6582088"},{"key":"ref18","article-title":"End the senseless killing: Improving memory management for mobile operating systems","author":"lebeck","year":"2020","journal-title":"Proc USENIX ATC"},{"key":"ref2","year":"2016","journal-title":"Slowing Growth Ahead for Worldwide Internet Audience"},{"key":"ref1","year":"0","journal-title":"Chrome"},{"key":"ref191","article-title":"Twizzler: A data-centric OS for non-volatile memory","author":"bittman","year":"2020","journal-title":"Proc USENIX ATC"},{"key":"ref192","year":"0","journal-title":"ASUS Chromebox 3"},{"key":"ref190","year":"2019","journal-title":"Intel Optane DIMM Pricing"},{"key":"ref199","year":"0","journal-title":"Instagram"},{"key":"ref197","year":"0","journal-title":"Intel Optane Memory M10 Series"},{"key":"ref198","year":"0","journal-title":"Facebook"},{"key":"ref195","year":"2017","journal-title":"SK Hynix 4GB DDR4 HMA851S6AFR6N-UH"},{"key":"ref196","year":"2020","journal-title":"SATA III M 2 Solid State Drive M 2 SSD 400S"},{"key":"ref193","doi-asserted-by":"publisher","DOI":"10.1145\/1610252.1610260"},{"key":"ref194","year":"2016","journal-title":"Intel Core i3-7100U Processor"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/10005208\/10258271.pdf?arnumber=10258271","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,23]],"date-time":"2023-10-23T18:28:08Z","timestamp":1698085688000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10258271\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023]]},"references-count":279,"URL":"https:\/\/doi.org\/10.1109\/access.2023.3317884","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023]]}}}