{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T19:01:12Z","timestamp":1771614072868,"version":"3.50.1"},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2024]]},"DOI":"10.1109\/access.2024.3393479","type":"journal-article","created":{"date-parts":[[2024,4,25]],"date-time":"2024-04-25T17:55:47Z","timestamp":1714067747000},"page":"59688-59701","source":"Crossref","is-referenced-by-count":4,"title":["Macro Memory Cell Generator for SKY130 PDK"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6243-219X","authenticated-orcid":false,"given":"Emilio Isaac","family":"Baungarten-Leon","sequence":"first","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6646-1529","authenticated-orcid":false,"given":"Susana","family":"Ortega-Cisneros","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4802-6632","authenticated-orcid":false,"given":"German","family":"Pinedo-Diaz","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5836-6246","authenticated-orcid":false,"given":"Miguel Angel","family":"Rivera Acosta","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6871-3611","authenticated-orcid":false,"given":"Francisco Javier","family":"Rodriguez Navarrete","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Uriel","family":"Jaramillo-Toral","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-6589-8344","authenticated-orcid":false,"given":"Cristian Torres","family":"Gonzlez","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-0766-5709","authenticated-orcid":false,"given":"Juan Carlos Garcia","family":"Lopez","sequence":"additional","affiliation":[{"name":"Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, Ciudad de México Zapopan, México"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-007-0129-7"},{"key":"ref2","volume-title":"Memory Chip Design","year":"2021"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT52063.2021.9427341"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2989-4"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICACCCT.2014.7019150"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2023.3293721"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2023.3290197"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2008.136"},{"key":"ref9","volume-title":"Products, Memory Products","year":"2024"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ewme.2014.6877402"},{"key":"ref11","volume-title":"Semiconductor IP and Application Security Solutions","year":"2024"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/isqed54688.2022.9806258"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2980098"},{"key":"ref14","volume-title":"SkyWater Open Source PDK","year":"2024"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/iedm13553.2020.9372047"},{"key":"ref16","first-page":"1","article-title":"OpenLane: The open-source digital ASIC implementation flow","volume-title":"Proc. Workshop Open-Source EDA Technol. (WOSET)","author":"Ghazy"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/vlsi-soc.2019.8920314"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/10380310\/10508358.pdf?arnumber=10508358","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,19]],"date-time":"2024-12-19T19:37:20Z","timestamp":1734637040000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10508358\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/access.2024.3393479","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024]]}}}