{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T18:44:34Z","timestamp":1780512274709,"version":"3.54.1"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/"}],"funder":[{"name":"JSPS KAKENHI","award":["JP24K02918"],"award-info":[{"award-number":["JP24K02918"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2024]]},"DOI":"10.1109\/access.2024.3432979","type":"journal-article","created":{"date-parts":[[2024,7,24]],"date-time":"2024-07-24T18:39:39Z","timestamp":1721846379000},"page":"102470-102480","source":"Crossref","is-referenced-by-count":12,"title":["Multiplication-Free Lookup-Based CNN Accelerator Using Residual Vector Quantization and Its FPGA Implementation"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0171-6679","authenticated-orcid":false,"given":"Hiroshi","family":"Fuketa","sequence":"first","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Toshihiro","family":"Katashita","sequence":"additional","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yohei","family":"Hori","sequence":"additional","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Masakazu","family":"Hioki","sequence":"additional","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2020.3034951"},{"key":"ref2","volume-title":"A100 Tensor Core GPU Datasheet","year":"2024"},{"key":"ref3","author":"Karumbunathan","year":"2024","journal-title":"NVIDIA Jetson AGX Orin Series Technical Brief"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067526"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067335"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185253"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454556"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757323"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MASSP.1984.1162229"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TPAMI.2010.57"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137218"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3570361.3613285"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3656643"},{"key":"ref14","article-title":"Stella nera: Achieving 161 TOp\/s\/W with multiplier-free DNN acceleration based on approximate matrix multiplication","author":"Sch\u00f6nleber","year":"2023","journal-title":"arXiv:2311. 10207"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3290151"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.1982.1171604"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.3390\/s101211259"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref19","article-title":"Estimating or propagating gradients through stochastic neurons for conditional computation","author":"Bengio","year":"2013","journal-title":"arXiv:1308.3432"},{"key":"ref20","first-page":"6309","article-title":"Neural discrete representation learning","volume-title":"Proc. Int. Conf. Neural Inf. Process. Syst. (NIPS)","author":"Oord"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52688.2022.01197"},{"key":"ref22","volume-title":"ZCU104 Evaluation Board User Guide","year":"2024"},{"key":"ref23","volume-title":"Nsight Systems User Guide","year":"2024"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3312775"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050344"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3126838"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10380310\/10608107.pdf?arnumber=10608107","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,7,30]],"date-time":"2024-07-30T05:04:13Z","timestamp":1722315853000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10608107\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/access.2024.3432979","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024]]}}}