{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,12]],"date-time":"2026-02-12T17:41:00Z","timestamp":1770918060548,"version":"3.50.1"},"reference-count":55,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2024]]},"DOI":"10.1109\/access.2024.3446308","type":"journal-article","created":{"date-parts":[[2024,8,19]],"date-time":"2024-08-19T17:34:24Z","timestamp":1724088864000},"page":"115532-115545","source":"Crossref","is-referenced-by-count":2,"title":["Analog Flat-Level Circuit Synthesis With Genetic Algorithms"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7616-9334","authenticated-orcid":false,"given":"Miguel","family":"Campilho-Gomes","sequence":"first","affiliation":[{"name":"Centro de Estudos e Desenvolvimento de Electrónica e Telecomunicações (CEDET), Instituto Superior de Engenharia de Lisboa (ISEL), Lisbon, Portugal"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6103-4851","authenticated-orcid":false,"given":"Rui","family":"Tavares","sequence":"additional","affiliation":[{"name":"NOVA School of Science and Technology, Caparica, Portugal"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8434-8391","authenticated-orcid":false,"given":"Jo\u00e3o","family":"Goes","sequence":"additional","affiliation":[{"name":"NOVA School of Science and Technology, Caparica, Portugal"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.10.017"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"316","DOI":"10.1016\/j.vlsi.2016.04.009","article-title":"AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation","volume":"55","author":"Louren\u00e7o","year":"2016","journal-title":"Integration"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2023195"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"48","DOI":"10.1016\/j.engappai.2019.01.012","article-title":"Analog circuit topology synthesis by means of evolutionary computation","volume":"80","author":"Rojec","year":"2019","journal-title":"Eng. Appl. Artif. Intell."},{"issue":"1","key":"ref5","first-page":"15","article-title":"An operational transconductance amplifier sizing methodology with genetic algorithm-based optimization","volume":"55","author":"Farag\u00f3","year":"2014","journal-title":"Acta Technica Napocensis. Electronica-Telecomunicatii"},{"key":"ref6","volume-title":"International Technology Roadmap for Semiconductors","year":"2019"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2010.06.003"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2977605"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/4235.996017"},{"key":"ref10","volume-title":"Genetic Programming: On the Programming of Computers By Means of Natural Selection","author":"Koza","year":"1992"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1143997.1144142"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.804109"},{"key":"ref13","article-title":"Evolution of transistor circuits","author":"Trefzer","year":"2006"},{"key":"ref14","volume-title":"Multi-Objective Optimization Using Evolutionary Algorithms","author":"Deb","year":"2001"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/217474.217566"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1162\/106365600568112"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCASM.2010.5620307"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008202821328"},{"key":"ref19","volume-title":"Microelectronic Circuits","author":"Sedra","year":"2014"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICNN.1995.488968"},{"issue":"1","key":"ref21","doi-asserted-by":"crossref","first-page":"687","DOI":"10.1016\/j.asoc.2007.05.007","article-title":"On the performance of artificial bee colony (ABC) algorithm","volume":"8","author":"Karaboga","year":"2008","journal-title":"Appl. Soft Comput."},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/NABIC.2009.5393356"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2008.4631059"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/BFb0057607"},{"key":"ref25","doi-asserted-by":"crossref","DOI":"10.1016\/j.mssp.2021.106002","article-title":"Advancement and challenges in MOSFET scaling","volume":"134","author":"Ratnesh","year":"2021","journal-title":"Mater. Sci. Semicond. Process."},{"key":"ref26","volume-title":"Genetic Algorithms in Search, Optimization and Machine Learning","author":"Goldberg","year":"1989"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-84800-094-0_2"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/BFb0057614"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ICEC.1998.699812"},{"key":"ref30","doi-asserted-by":"crossref","first-page":"113","DOI":"10.1016\/j.vlsi.2020.11.006","article-title":"Review: Machine learning techniques in analog\/RF integrated circuit design, synthesis, layout, and test","volume":"77","author":"Afacan","year":"2021","journal-title":"Integration"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD.2018.8434887"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD.2019.8795219"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3282570"},{"key":"ref34","doi-asserted-by":"crossref","first-page":"162","DOI":"10.1016\/j.vlsi.2019.01.012","article-title":"A comprehensive analysis on differential cross-coupled CMOS LC oscillators via multi-objective optimization","volume":"67","author":"Afacan","year":"2019","journal-title":"Integration"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD55068.2022.9816265"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1999.782233"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/43.848091"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ICEC.1996.542405"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-45124-0_9"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/43.44506"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.818374"},{"key":"ref42","volume-title":"Mixed Mode-Mixed Level Circuit Simulator Based on Berkeleys SPICE 3F5","year":"2019"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942062"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2883978"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.7551\/mitpress\/1090.001.0001"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2001.922078"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1016\/S0045-7825(01)00323-1"},{"key":"ref48","article-title":"Time-domain optimization of amplifiers based on distributed genetic algorithms","author":"Santos-Tavares","year":"2010"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2006.878096"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/WCNC.2014.6952773"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1007\/s11633-014-0870-x"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2009.09.001"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1088\/0305-4470\/31\/41\/011"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2006.886801"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2000.870754"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10380310\/10639393.pdf?arnumber=10639393","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,11]],"date-time":"2024-09-11T05:02:02Z","timestamp":1726030922000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10639393\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"references-count":55,"URL":"https:\/\/doi.org\/10.1109\/access.2024.3446308","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024]]}}}