{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T15:00:10Z","timestamp":1773414010743,"version":"3.50.1"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2024]]},"DOI":"10.1109\/access.2024.3506059","type":"journal-article","created":{"date-parts":[[2024,11,25]],"date-time":"2024-11-25T18:49:07Z","timestamp":1732560547000},"page":"177781-177794","source":"Crossref","is-referenced-by-count":3,"title":["The Impact of Asymmetric Transistor Aging on Clock Tree Design Considerations"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-6295-4557","authenticated-orcid":false,"given":"Firas","family":"Ramadan","sequence":"first","affiliation":[{"name":"Faculty of Electrical and Computer Engineering, Technion-Israel Institute of Technology, Haifa, Israel"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-1962-9760","authenticated-orcid":false,"given":"Majd","family":"Ganaeim","sequence":"additional","affiliation":[{"name":"Faculty of Electrical and Computer Engineering, Technion-Israel Institute of Technology, Haifa, Israel"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-4921-3794","authenticated-orcid":false,"given":"Maayan","family":"Ella","sequence":"additional","affiliation":[{"name":"Faculty of Electrical and Computer Engineering, Technion-Israel Institute of Technology, Haifa, Israel"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6549-7957","authenticated-orcid":false,"given":"Freddy","family":"Gabbay","sequence":"additional","affiliation":[{"name":"Faculty of Sciences, Institute of Applied Physics, The Hebrew University of Jerusalem, Jerusalem, Israel"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1186\/s11782-020-00082-6"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.comnet.2022.109032"},{"key":"ref3","volume-title":"Component Technical Committee Automotive Electronics Council, Failure Mechanism Based Stress Test Qualification for Integrated Circuit","year":"2023"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2021.114090"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/isqed.2014.6783365"},{"key":"ref6","first-page":"60","article-title":"Electromigration-aware instruction execution for modern microprocessors","volume-title":"Proc. 4th Int. Conf. Microelectron. Device Technol. (MicDAT)","author":"Gabbay"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea13010007"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea13030044"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320885"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457137"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.51.4218"},{"key":"ref12","volume-title":"Cadence Virtuoso Spectre User Manual","year":"2024"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2006.10.012"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2007.910130"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2007.22"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2007.4397353"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-23781-3_3"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00047"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3146347.3146356"},{"key":"ref20","first-page":"1","article-title":"Nyuzi: An open source GPGPU for graphics, enhanced with OpenCL compiler for calculations","volume-title":"Proc. IEEE Design, Autom. Test Eur.","author":"Bush"},{"key":"ref21","first-page":"14","article-title":"Clock tree design considerations in the presence of asymmetric transistor aging","volume-title":"Proc. DVCon Eur., Design Verification Conf. Exhib. Eur.","author":"Gabbay"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1016\/b978-0-12-370597-6.x5000-8"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/54.2032"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1049\/ip-i-1.1983.0026"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2013.07.044"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280814"},{"key":"ref27","volume-title":"HTOL - Temperature, Bias, and Operating Life","year":"2016"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059010"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2287187"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10380310\/10767133.pdf?arnumber=10767133","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,11]],"date-time":"2024-12-11T02:26:02Z","timestamp":1733883962000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10767133\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/access.2024.3506059","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024]]}}}