{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T20:23:57Z","timestamp":1740169437968,"version":"3.37.3"},"reference-count":71,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/501100000038","name":"Natural Sciences and Engineering Research Council of Canada","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2024]]},"DOI":"10.1109\/access.2024.3509606","type":"journal-article","created":{"date-parts":[[2024,12,2]],"date-time":"2024-12-02T18:41:02Z","timestamp":1733164862000},"page":"189574-189589","source":"Crossref","is-referenced-by-count":0,"title":["Hybrid Graph Representation and Learning Framework for High-Level Synthesis Design Space Exploration"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5166-2790","authenticated-orcid":false,"given":"Pouya","family":"Taghipour","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, LaCIME, &#x00C9;cole de Technologie Sup&#x00E9;rieure (&#x00C9;TS), Montreal, QC, Canada"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6116-7945","authenticated-orcid":false,"given":"Eric","family":"Granger","sequence":"additional","affiliation":[{"name":"Department of Systems Engineering, LIVIA, ILLS, &#x00C9;cole de Technologie Sup&#x00E9;rieure (&#x00C9;TS), Montreal, QC, Canada"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6204-7427","authenticated-orcid":false,"given":"Yves","family":"Blaqui\u00e8re","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, LaCIME, &#x00C9;cole de Technologie Sup&#x00E9;rieure (&#x00C9;TS), Montreal, QC, Canada"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2022.102561"},{"key":"ref2","article-title":"Reconfigurable hardware accelerators: Opportunities, trends, and challenges","author":"Wang","year":"2017","journal-title":"arXiv:1712.04771"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2017.3211123"},{"key":"ref4","first-page":"365","article-title":"Dark silicon and the end of multicore scaling","volume-title":"Proc. 38th Annu. Int. Symp. Comput. Archit. (ISCA)","author":"Esmaeilzadeh"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD56317.2022.00039"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ieeestd.2000.91308"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ieeestd.2011.5944940"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-3636-9"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3201107"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2513673"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3530775"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3024098"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2912916"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/tpds.2020.3039409"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3303840"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2943570"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1155\/2020\/7095048"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3012750"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2018.2794068"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240815"},{"key":"ref21","first-page":"157","article-title":"Exploiting loop-array dependencies to accelerate the design space exploration with high level synthesis","volume-title":"Proc. Design, Autom. Test Eur. Conf. Exhib. (DATE)","author":"Pham"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2014.6974719"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898040"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062251"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203809"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428073"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240850"},{"article-title":"Design space exploration in high-level synthesis","year":"2020","author":"Ferretti","key":"ref28"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2005.860764"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/3041219"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2472007"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/BF01009452"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISED.2014.10"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/HPCS.2018.00030"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/2248418.2248436"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430636"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927161"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3185540"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3503540"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3570925"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3288756"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530629"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530409"},{"key":"ref44","article-title":"Program-to-circuit: Exploiting GNNs for program representation and circuit translation","author":"Wu","year":"2021","journal-title":"arXiv:2109.06265"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-26408-0"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1016\/j.aiopen.2021.01.001"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2020.2978386"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323853"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530408"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP54787.2022.00013"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2014.6983050"},{"volume-title":"Clang: A C Language Family Frontend for LLVM","key":"ref52"},{"volume-title":"Xilinx Vitis HLS","year":"2024","key":"ref53"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"volume-title":"The LLVM Compiler Infrastructure","year":"2024","key":"ref55"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2017.2693418"},{"key":"ref57","article-title":"Graph pooling for graph neural networks: Progress, challenges, and opportunities","author":"Liu","year":"2022","journal-title":"arXiv:2204.07321"},{"key":"ref58","first-page":"1","article-title":"Deep sets","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","volume":"30","author":"Zaheer"},{"key":"ref59","article-title":"Revisiting multi-task learning in the deep learning era","author":"Vandenhende","year":"2020","journal-title":"arXiv:2004.13379"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.48550\/ARXIV.1609.02907"},{"key":"ref61","first-page":"3844","article-title":"Convolutional neural networks on graphs with fast localized spectral filtering","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","volume":"29","author":"Defferrard"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.2200\/S01045ED1V01Y202009AIM046"},{"key":"ref63","first-page":"1263","article-title":"Neural message passing for quantum chemistry","volume-title":"Proc. Int. Conf. Mach. Learn.","author":"Gilmer"},{"key":"ref64","first-page":"2244","article-title":"ProGraML: A graph-based program representation for data flow analysis and compiler optimizations","volume-title":"Proc. 38th Int. Conf. Mach. Learn. (ICML)","author":"Cummins"},{"volume-title":"Vivado Design Suite User Guide","year":"2022","key":"ref65"},{"volume-title":"Python","year":"2024","key":"ref66"},{"key":"ref67","first-page":"1","article-title":"PyTorch: An imperative style, high-performance deep learning library","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","volume":"32","author":"Paszke"},{"key":"ref68","article-title":"Fast graph representation learning with PyTorch geometric","author":"Fey","year":"2019","journal-title":"arXiv:1903.02428"},{"volume-title":"Ubuntu\u2014Open Source Operating System","year":"2024","key":"ref69"},{"key":"ref70","first-page":"1","article-title":"Inductive representation learning on large graphs","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","volume":"30","author":"Hamilton"},{"key":"ref71","article-title":"Adam: A method for stochastic optimization","author":"Kingma","year":"2014","journal-title":"arXiv:1412.6980"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10380310\/10772109.pdf?arnumber=10772109","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,20]],"date-time":"2024-12-20T06:09:13Z","timestamp":1734674953000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10772109\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"references-count":71,"URL":"https:\/\/doi.org\/10.1109\/access.2024.3509606","relation":{},"ISSN":["2169-3536"],"issn-type":[{"type":"electronic","value":"2169-3536"}],"subject":[],"published":{"date-parts":[[2024]]}}}