{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,14]],"date-time":"2026-04-14T02:07:49Z","timestamp":1776132469499,"version":"3.50.1"},"reference-count":35,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/100004358","name":"Samsung","doi-asserted-by":"publisher","award":["IO231026-07504-01"],"award-info":[{"award-number":["IO231026-07504-01"]}],"id":[{"id":"10.13039\/100004358","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Technology Innovation Program"},{"DOI":"10.13039\/501100003052","name":"Ministry of Trade, Industry, and Energy","doi-asserted-by":"publisher","award":["RS-2023-00236091"],"award-info":[{"award-number":["RS-2023-00236091"]}],"id":[{"id":"10.13039\/501100003052","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2025]]},"DOI":"10.1109\/access.2024.3523434","type":"journal-article","created":{"date-parts":[[2024,12,27]],"date-time":"2024-12-27T19:25:50Z","timestamp":1735327550000},"page":"5396-5405","source":"Crossref","is-referenced-by-count":14,"title":["A Comparative Analysis of Middle-of-Line Contact Architectures for Complementary FETs"],"prefix":"10.1109","volume":"13","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-9132-2620","authenticated-orcid":false,"given":"Seung","family":"Kyu Kim","sequence":"first","affiliation":[{"name":"Department of Semiconductor and Display Engineering, Sungkyunkwan University, Suwon-si, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-1714-4021","authenticated-orcid":false,"given":"Johyeon","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Semiconductor Convergence Engineering, Sungkyunkwan University, Suwon-si, South Korea"}]},{"given":"Gunhee","family":"Choi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon-si, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4513-8532","authenticated-orcid":false,"given":"Kee-Won","family":"Kwon","sequence":"additional","affiliation":[{"name":"Department of Semiconductor and Display Engineering, Sungkyunkwan University, Suwon-si, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5232-650X","authenticated-orcid":false,"given":"Jongwook","family":"Jeon","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon-si, South Korea"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/tnano.2019.2942456"},{"key":"ref2","first-page":"27.1.1","article-title":"Critical process features enabling aggressive contacted gate pitch scaling for 3 nm CMOS technology and beyond","volume-title":"IEDM Tech. Dig.","author":"Chang"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ted.2022.3178665"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/vlsit.2018.8510618"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/jeds.2021.3136605"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2023.3323449"},{"key":"ref7","first-page":"1","article-title":"Demonstration of a stacked CMOS inverter at 60 nm gate pitch with power via and direct backside device contacts","volume-title":"IEDM Tech. Dig.","author":"Radosavljevi\u0107"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46783.2024.10631556"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45741.2023.10413672"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45741.2023.10413694"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2019.8776513"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45741.2023.10413701"},{"key":"ref13","first-page":"20.4.1","article-title":"Power aware FinFET and lateral nanosheet FET targeting for 3 nm CMOS technology","volume-title":"IEDM Tech. Dig.","author":"Yakimets"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2015.7223646"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IWJT.2018.8330298"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2017.7998177"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2022.3220339"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2019.2897873"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2023.3237386"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2002.1175793"},{"key":"ref21","volume-title":"Version T-2022.03","year":"2022"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2015.7223683"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/EDTM.2019.8731234"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2017.7998183"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3195506"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2024.3368380"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2018.8551723"},{"key":"ref28","volume-title":"HSPICE User Guide","year":"2019"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/IITC.2018.8430457"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/IITC61274.2024.10732165"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2023.3235701"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2022.3207972"},{"key":"ref33","volume-title":"Raphael Reference Manual, Version T-2022.03","year":"2022"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2012.2197592"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-023-06145-x"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10820123\/10816635.pdf?arnumber=10816635","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,10]],"date-time":"2025-01-10T20:49:16Z","timestamp":1736542156000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10816635\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025]]},"references-count":35,"URL":"https:\/\/doi.org\/10.1109\/access.2024.3523434","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025]]}}}