{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,16]],"date-time":"2025-01-16T05:36:43Z","timestamp":1737005803314,"version":"3.33.0"},"reference-count":85,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"name":"scientific collaboration between Bordeaux INP and Universit\u00e9 Bretagne Sud"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2025]]},"DOI":"10.1109\/access.2025.3527028","type":"journal-article","created":{"date-parts":[[2025,1,8]],"date-time":"2025-01-08T20:25:08Z","timestamp":1736367908000},"page":"6964-6976","source":"Crossref","is-referenced-by-count":0,"title":["Specialized Scalar and SIMD Instructions for Error Correction Codes Decoding on RISC-V Processors"],"prefix":"10.1109","volume":"13","author":[{"given":"Mael","family":"Tourres","sequence":"first","affiliation":[{"name":"IMS,UMR 5218, University of Bordeaux, Bordeaux, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7993-4628","authenticated-orcid":false,"given":"Cyrille","family":"Chavet","sequence":"additional","affiliation":[{"name":"Lab-STICC, UMR 6285, University of Bretagne Sud, Lorient, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2269-8756","authenticated-orcid":false,"given":"Bertrand Le","family":"Gal","sequence":"additional","affiliation":[{"name":"IMS,UMR 5218, University of Bordeaux, Bordeaux, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7222-5271","authenticated-orcid":false,"given":"Philippe","family":"Coussy","sequence":"additional","affiliation":[{"name":"Lab-STICC, UMR 6285, University of Bretagne Sud, Lorient, France"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.001.2000526"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2001.968726"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2018.00022"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3246491"},{"volume-title":"Intel Architecture Instruction Set Extensions and Future Features\u2014Programming Reference","year":"2023","key":"ref5"},{"volume-title":"ARM Architecture Reference Manual for A-Profile Architecture","year":"2023","key":"ref6"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2014.2371781"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISTC.2016.7593092"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2017.8110001"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-018-1430-3"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s12243-019-00727-5"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-019-01447-8"},{"volume-title":"RISC-V Technical Specification","year":"2021","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS50681.2021.9462781"},{"volume-title":"PicoRV32 RISC-V Core","year":"2021","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2654506"},{"volume-title":"Ibex RISC-V Core","year":"2021","key":"ref17"},{"volume-title":"SCR1 RISC-V Core","year":"2021","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.1993.397441"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.23919\/SEEDA-CECNSM.2018.8544937"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1962.1057683"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2006.261681"},{"volume-title":"CCSDS 231.1-O-1\u2014Orange Book\u2014Short Block Length LDPC Codes for TC Synchronization and Channel Coding","year":"2015","key":"ref23"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2009.2021379"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7169065"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2015.2510381"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7527192"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISTC.2018.8625377"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2279186"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2014.2334952"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2014.2355255"},{"volume-title":"INTEL 5G Vision (Network, Cloud Client)","year":"2017","key":"ref32"},{"volume-title":"The benefits of cloud-RAN architecture in mobile network expansion","year":"2015","author":"Lyashev","key":"ref33"},{"volume-title":"Exploring computing platforms for radio access networks\u2013Heterogeneous computing at the network edge","year":"2019","author":"Butcher","key":"ref34"},{"volume-title":"5G experimental facilities in Europe","year":"2020","author":"Verdone","key":"ref35"},{"key":"ref36","first-page":"1","article-title":"The OpenAirInterface 5G new radio implementation: Current status and roadmap","volume-title":"Proc. WSA","author":"Kaltenberger"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISTC49272.2021.9594063"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS49266.2020.9294906"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2011.5941087"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TURBOCODING.2008.4658677"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.036"},{"volume-title":"Advanced Hardware Design for Error Correcting Codes","year":"2014","author":"Chavet","key":"ref42"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ISTC.2018.8625310"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.1055"},{"key":"ref45","first-page":"1437","article-title":"A dynamically reconfigurable ECC decoder architecture","volume-title":"Proc. Design, Autom. Test Eur. Conf. Exhib. (DATE)","author":"Sani"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT52063.2021.9427339"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP52443.2021.00018"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/DSD51259.2020.00045"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2020.i4.239-280"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2021.i1.109-136"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/CSCI49370.2019.00130"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-29611-7_1"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS47522.2019.9020464"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/ICCSS55260.2022.9802445"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/PATMOS.2017.8106976"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2019.8682287"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.2997691"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/4234.905934"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/TURBOCODING.2008.4658686"},{"volume-title":"Efficient hardware implementations of LDPC decoders, through exploiting impreciseness in message-passing decoding algorithms","year":"2017","author":"Ly","key":"ref60"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2015.7421419"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/PIMRC.2014.7136225"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2015.2439211"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2010.05.070096"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2014.6855069"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2015.2477081"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2017.2783971"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1587\/transfun.E97.A.1027"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1109\/GLOCOM.2002.1188425"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2004.1363033"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2016.2594265"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2015.7345034"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2018.8605604"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1109\/ICC40277.2020.9149099"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1016\/j.softx.2019.100345"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2015.2435787"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/EUSIPCO.2016.7760327"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2021.3126127"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2019.2893851"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2014.140514"},{"volume-title":"RISCY RISC-V Core","year":"2021","key":"ref81"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/ICSTCC59206.2023.10308510"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/PATMOS.2019.8862170"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS49936.2021.00054"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2950087"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10820123\/10833617.pdf?arnumber=10833617","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,15]],"date-time":"2025-01-15T20:11:38Z","timestamp":1736971898000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10833617\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025]]},"references-count":85,"URL":"https:\/\/doi.org\/10.1109\/access.2025.3527028","relation":{},"ISSN":["2169-3536"],"issn-type":[{"type":"electronic","value":"2169-3536"}],"subject":[],"published":{"date-parts":[[2025]]}}}