{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T18:44:28Z","timestamp":1780512268307,"version":"3.54.1"},"reference-count":28,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/"}],"funder":[{"name":"JSPS KAKENHI","award":["JP24K02918"],"award-info":[{"award-number":["JP24K02918"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2025]]},"DOI":"10.1109\/access.2025.3581957","type":"journal-article","created":{"date-parts":[[2025,6,20]],"date-time":"2025-06-20T13:29:19Z","timestamp":1750426159000},"page":"107165-107174","source":"Crossref","is-referenced-by-count":1,"title":["Fully Quantized Matrix Arithmetic-Only BERT Model and Its FPGA-Based Accelerator"],"prefix":"10.1109","volume":"13","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0171-6679","authenticated-orcid":false,"given":"Hiroshi","family":"Fuketa","sequence":"first","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Toshihiro","family":"Katashita","sequence":"additional","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yohei","family":"Hori","sequence":"additional","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5641-9252","authenticated-orcid":false,"given":"Masakazu","family":"Hioki","sequence":"additional","affiliation":[{"name":"National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Ibaraki, Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","first-page":"4171","article-title":"BERT: Pre-training of deep bidirectional transformers for language understanding","volume-title":"Proc. North Amer. Chapter Assoc. Comput. Linguistics, Hum. Lang. Technol. (NAACL)","author":"Devlin"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.acl-main.195"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2020.3034951"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.emnlp-main.37"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2021.acl-long.334"},{"key":"ref6","first-page":"5506","article-title":"I-BERT: Integer-only BERT quantization","volume-title":"Proc. Int. Conf. Learn. Represent. (ICLR)","author":"Kim"},{"key":"ref7","first-page":"1","article-title":"MA-BERT: Towards matrix arithmetic-only BERT inference by eliminating complex non-linear functions","volume-title":"Proc. Int. Conf. Learn. Represent. (ICLR)","author":"Ming"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3570361.3613285"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3290151"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2024.3432979"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474043"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439477"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323752"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3714416"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676733"},{"key":"ref16","first-page":"8741","article-title":"PowerNorm: Rethinking batch normalization in transformers","volume-title":"Proc. Int. Conf. Mach. Learn. (ICML)","author":"Shen"},{"key":"ref17","article-title":"Ternary weight networks","author":"Li","year":"2016","journal-title":"arXiv:1605.04711"},{"key":"ref18","volume-title":"BERT Base Model (Uncased)","year":"2025"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/W18-5446"},{"key":"ref20","volume-title":"Text Classification Examples, GLUE Tasks","year":"2025"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.48550\/arXiv.1503.02531"},{"key":"ref22","article-title":"DistilBERT, a distilled version of BERT: Smaller, faster, cheaper and lighter","author":"Sanh","year":"2019","journal-title":"arXiv:1910.01108"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.findings-emnlp.372"},{"key":"ref24","volume-title":"ZCU104 Evaluation Board User Guide","year":"2025"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.48550\/ARXIV.1706.03762"},{"key":"ref26","volume-title":"UltraScale Architecture DSP Slice User Guide","year":"2025"},{"key":"ref27","volume-title":"H100 Tensor Core GPU Specifications","year":"2025"},{"key":"ref28","volume-title":"Accelerator Module Datasheet","year":"2025"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10820123\/11045889.pdf?arnumber=11045889","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,18]],"date-time":"2025-07-18T04:48:13Z","timestamp":1752814093000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11045889\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/access.2025.3581957","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025]]}}}