{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,4]],"date-time":"2026-06-04T18:59:16Z","timestamp":1780599556047,"version":"3.54.1"},"reference-count":240,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"name":"Brains for Brussels Research and Innovation Funding Program funded by the R\u00e9gion de Bruxelles-Capitale\u2013Innoviris","award":["BFB 2023-BFB-2"],"award-info":[{"award-number":["BFB 2023-BFB-2"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2025]]},"DOI":"10.1109\/access.2025.3607865","type":"journal-article","created":{"date-parts":[[2025,9,9]],"date-time":"2025-09-09T17:33:24Z","timestamp":1757439204000},"page":"167364-167389","source":"Crossref","is-referenced-by-count":3,"title":["AI-Driven Integrated Circuit Design: A Survey of Techniques, Challenges, and Opportunities"],"prefix":"10.1109","volume":"13","author":[{"ORCID":"https:\/\/orcid.org\/0009-0000-5212-8311","authenticated-orcid":false,"given":"Islam","family":"Guven","sequence":"first","affiliation":[{"name":"Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Universit&#x00E9; catholique de Louvain, Ottignies-Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0276-9289","authenticated-orcid":false,"given":"Mehmet","family":"Parlak","sequence":"additional","affiliation":[{"name":"Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Universit&#x00E9; catholique de Louvain, Ottignies-Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1405-4101","authenticated-orcid":false,"given":"Dimitri","family":"Lederer","sequence":"additional","affiliation":[{"name":"Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Universit&#x00E9; catholique de Louvain, Ottignies-Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5049-2929","authenticated-orcid":false,"given":"Christophe","family":"De Vleeschouwer","sequence":"additional","affiliation":[{"name":"Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Universit&#x00E9; catholique de Louvain, Ottignies-Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.899053"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.64"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3147431"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.889371"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2162067"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2009.09.001"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2768826"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218515"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-024-54178-1"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JMW.2023.3237260"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676816"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2025.3573228"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS57524.2023.10406135"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2025.3553743"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2020.11.006"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3065332"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2023.06.002"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISEDA62518.2024.10617712"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD52597.2021.9531070"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3317371"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ACIT52158.2021.9548117"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITSA60681.2024.10546365"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.3991\/ijep.v10i6.14567"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/4235.996017"},{"key":"ref25","first-page":"1","article-title":"Practical Bayesian optimization of machine learning algorithms","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","author":"Snoek"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218757"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ETS56758.2023.10174129"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/LMWC.2022.3161979"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3385368"},{"key":"ref30","article-title":"Playing Atari with deep reinforcement learning","author":"Mnih","year":"2013","journal-title":"arXiv:1312.5602"},{"key":"ref31","article-title":"Trust region policy optimization","author":"Schulman","year":"2015","journal-title":"arXiv:1502.05477"},{"key":"ref32","article-title":"Proximal policy optimization algorithms","author":"Schulman","year":"2017","journal-title":"arXiv:1707.06347"},{"key":"ref33","article-title":"Continuous control with deep reinforcement learning","author":"Lillicrap","year":"2015","journal-title":"arXiv:1509.02971"},{"key":"ref34","article-title":"Soft actor-critic: Off-policy maximum entropy deep reinforcement learning with a stochastic actor","author":"Haarnoja","year":"2018","journal-title":"arXiv:1801.01290"},{"key":"ref35","article-title":"A survey of imitation learning: Algorithms, recent developments, and challenges","author":"Zare","year":"2023","journal-title":"arXiv:2309.02473"},{"key":"ref36","article-title":"Value-decomposition networks for cooperative multi-agent learning","author":"Sunehag","year":"2017","journal-title":"arXiv:1706.05296"},{"key":"ref37","article-title":"QMIX: Monotonic value function factorisation for deep multi-agent reinforcement learning","author":"Rashid","year":"2018","journal-title":"arXiv:1803.11485"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-28954-6"},{"key":"ref39","first-page":"1","article-title":"A unified approach to interpreting model predictions","volume-title":"Proc. Adv. Neural Inf. Process. Syst.","author":"Lundberg"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/N16-3020"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.2017.74"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2010.2093581"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3166637"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2025.3528372"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.13164\/re.2015.0161"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1590\/2179-10742023v22i1265775"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.4028\/www.scientific.net\/KEM.643.131"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2004.841308"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3153437"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774699"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3245979"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD55463.2022.9900093"},{"key":"ref53","article-title":"AUTOCIRCUIT-RL: Reinforcement learning-driven LLM for automated circuit topology generation","author":"Vijayaraghavan","year":"2025","journal-title":"arXiv:2506.03122"},{"key":"ref54","article-title":"CktGNN: Circuit graph neural network for electronic design automation","author":"Dong","year":"2023","journal-title":"arXiv:2308.16406"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3155444"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1117\/12.3072077"},{"key":"ref57","article-title":"LIMCA: LLM for automating analog in-memory computing architecture design exploration","author":"Vungarala","year":"2025","journal-title":"arXiv:2503.13301"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ICLAD65226.2025.00015"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2376987"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.4028\/www.scientific.net\/KEM.596.187"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.7251\/els1620055d"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1155\/2014\/593684"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1051\/e3sconf\/202235101017"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401139"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.11591\/eei.v12i5.5512"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.3390\/computation11110230"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.3390\/technologies7020040"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2010.5585957"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.11591\/eei.v12i6.6153"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2015.05.004"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1145\/2330163.2330318"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1145\/3626096"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.3233\/AJW220087"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1155\/2023\/6691214"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1002\/jnm.2790"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.14"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/NETACT.2017.8076742"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1109\/ICM.2011.6177400"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2016.7869958"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2002.1046285"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1109\/ICECOCS50124.2020.9314428"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3089937"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/ISEDA62518.2024.10617598"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/CAS52836.2021.9604128"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2187207"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1080\/00207217.2014.989924"},{"key":"ref87","article-title":"Domain knowledge-based automated analog circuit design with deep reinforcement learning","author":"Cao","year":"2022","journal-title":"arXiv:2202.13185"},{"key":"ref88","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2025.3537588"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS54282.2022.9869961"},{"key":"ref90","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586087"},{"key":"ref91","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9181149"},{"key":"ref92","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD55463.2022.9900083"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1109\/ISEDA62518.2024.10617708"},{"key":"ref94","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116200"},{"key":"ref95","doi-asserted-by":"publisher","DOI":"10.1109\/ICCS62517.2024.10846092"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247909"},{"key":"ref97","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3398554"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10136894"},{"key":"ref99","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586189"},{"key":"ref100","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3435692"},{"key":"ref101","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247991"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD55463.2022.9900079"},{"key":"ref103","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247739"},{"key":"ref104","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2024.3478832"},{"key":"ref105","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD58065.2023.10192204"},{"key":"ref106","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD61181.2024.10745428"},{"key":"ref107","article-title":"Learning to design circuits","author":"Wang","year":"2018","journal-title":"arXiv:1812.02734"},{"key":"ref108","doi-asserted-by":"publisher","DOI":"10.1016\/j.engappai.2023.107426"},{"key":"ref109","doi-asserted-by":"publisher","DOI":"10.1109\/IC363308.2025.10957700"},{"key":"ref110","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586139"},{"key":"ref111","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS58744.2024.10558165"},{"key":"ref112","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3183156"},{"key":"ref113","doi-asserted-by":"publisher","DOI":"10.1109\/iWRFAT61200.2024.10594280"},{"key":"ref114","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD52597.2021.9531156"},{"key":"ref115","doi-asserted-by":"publisher","DOI":"10.1109\/ICCES51560.2020.9334576"},{"key":"ref116","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD48534.2019.9142051"},{"key":"ref117","volume-title":"BAAL: Bayesian automated low voltage drop regulator design","author":"Daher","year":"2022"},{"key":"ref118","volume-title":"ABADDON: Automated Bayesian analog design of devices for SoC amplifier systems","author":"Daher","year":"2022"},{"key":"ref119","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465872"},{"key":"ref120","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586172"},{"key":"ref121","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401205"},{"key":"ref122","first-page":"1","article-title":"An efficient multi-fidelity Bayesian optimization approach for analog circuit synthesis","volume-title":"Proc. 56th ACM\/IEEE Design Autom. Conf. (DAC)","author":"Zhang"},{"key":"ref123","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714788"},{"key":"ref124","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD55463.2022.9900104"},{"key":"ref125","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS48785.2022.9937600"},{"key":"ref126","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3314519"},{"key":"ref127","article-title":"Preference-aware constrained multi-objective Bayesian optimization","author":"Ahmadianshalchi","year":"2023","journal-title":"arXiv:2303.13034"},{"key":"ref128","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v34i06.6561"},{"key":"ref129","doi-asserted-by":"publisher","DOI":"10.1109\/RADIOELEK.2015.7129048"},{"key":"ref130","doi-asserted-by":"publisher","DOI":"10.3390\/electronics13132510"},{"key":"ref131","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2005.1594251"},{"key":"ref132","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1991.185284"},{"key":"ref133","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2002.1187213"},{"key":"ref134","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2729461"},{"key":"ref135","doi-asserted-by":"publisher","DOI":"10.1109\/43.3185"},{"key":"ref136","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-33-6893-4_37"},{"key":"ref137","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2071250"},{"key":"ref138","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3044949"},{"key":"ref139","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942062"},{"key":"ref140","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2022.3150271"},{"key":"ref141","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2961322"},{"key":"ref142","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3081405"},{"key":"ref143","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546592"},{"key":"ref144","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2022.154105"},{"key":"ref145","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2016.7743986"},{"key":"ref146","article-title":"Analog\/mixed-signal circuit synthesis enabled by the advancements of circuit architectures and machine learning algorithms","author":"Su","year":"2021","journal-title":"arXiv:2112.07824"},{"key":"ref147","doi-asserted-by":"publisher","DOI":"10.1109\/IMS37962.2022.9865421"},{"key":"ref148","first-page":"627","article-title":"Efficient parametric yield estimation of analog\/mixed-signal circuits via Bayesian model fusion","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput.-Aided Design (ICCAD)","author":"Li"},{"key":"ref149","doi-asserted-by":"publisher","DOI":"10.1109\/MOCAST.2018.8376657"},{"key":"ref150","doi-asserted-by":"publisher","DOI":"10.1109\/TETCI.2018.2864747"},{"key":"ref151","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD58065.2023.10192155"},{"key":"ref152","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT53777.2021.9601131"},{"key":"ref153","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2024.3518913"},{"key":"ref154","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-024-72478-w"},{"key":"ref155","doi-asserted-by":"publisher","DOI":"10.1109\/APMC57107.2023.10439858"},{"key":"ref156","doi-asserted-by":"publisher","DOI":"10.1109\/TAP.2013.2283605"},{"key":"ref157","doi-asserted-by":"publisher","DOI":"10.1109\/TAP.2021.3069543"},{"key":"ref158","doi-asserted-by":"publisher","DOI":"10.1016\/j.eswa.2025.128414"},{"key":"ref159","doi-asserted-by":"publisher","DOI":"10.1016\/j.chip.2025.100135"},{"key":"ref160","doi-asserted-by":"publisher","DOI":"10.1145\/3658617.3697603"},{"key":"ref161","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2025.3582175"},{"key":"ref162","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2013.2248012"},{"key":"ref163","doi-asserted-by":"publisher","DOI":"10.1016\/j.knosys.2022.109987"},{"key":"ref164","doi-asserted-by":"publisher","DOI":"10.3390\/electronics9040685"},{"key":"ref165","doi-asserted-by":"publisher","DOI":"10.3390\/mi12111341"},{"key":"ref166","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2284109"},{"key":"ref167","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3105811"},{"key":"ref168","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3078240"},{"key":"ref169","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2564362"},{"key":"ref170","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3276315"},{"key":"ref171","doi-asserted-by":"publisher","DOI":"10.1109\/RFIT54256.2022.9882516"},{"key":"ref172","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC49505.2020.9218278"},{"key":"ref173","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevApplied.16.064006"},{"key":"ref174","doi-asserted-by":"publisher","DOI":"10.1109\/IMS30576.2020.9223952"},{"key":"ref175","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC51529.2024.00042"},{"key":"ref176","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3068303"},{"key":"ref177","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3094221"},{"key":"ref178","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2017.01.009"},{"key":"ref179","doi-asserted-by":"publisher","DOI":"10.1109\/4.44994"},{"key":"ref180","doi-asserted-by":"publisher","DOI":"10.1109\/5.265355"},{"key":"ref181","doi-asserted-by":"publisher","DOI":"10.1109\/9780470546512"},{"key":"ref182","doi-asserted-by":"publisher","DOI":"10.1109\/IC2ECS64405.2024.10928664"},{"key":"ref183","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS58744.2024.10558520"},{"key":"ref184","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT54769.2022.9768074"},{"key":"ref185","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD61181.2024.10745442"},{"key":"ref186","doi-asserted-by":"publisher","DOI":"10.23919\/DATE64628.2025.10992888"},{"key":"ref187","doi-asserted-by":"publisher","DOI":"10.1109\/smacd65553.2025.11092015"},{"key":"ref188","doi-asserted-by":"publisher","DOI":"10.1109\/ICEIC57457.2023.10049861"},{"key":"ref189","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2020.3042177"},{"key":"ref190","doi-asserted-by":"publisher","DOI":"10.3390\/electronics12020465"},{"key":"ref191","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2020.3024153"},{"key":"ref192","first-page":"1","article-title":"A customized graph neural network model for guiding analog IC placement","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Design (ICCAD)","author":"Li"},{"key":"ref193","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-021-03544-w"},{"key":"ref194","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD63220.2024.00030"},{"key":"ref195","doi-asserted-by":"publisher","DOI":"10.1109\/ICICM63644.2024.10814149"},{"key":"ref196","doi-asserted-by":"publisher","DOI":"10.1145\/3658617.3697703"},{"key":"ref197","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-016-0721-5"},{"key":"ref198","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2968744"},{"key":"ref199","doi-asserted-by":"publisher","DOI":"10.3390\/s21206889"},{"key":"ref200","doi-asserted-by":"publisher","DOI":"10.1117\/12.3033082"},{"key":"ref201","doi-asserted-by":"publisher","DOI":"10.3390\/electronics13061123"},{"key":"ref202","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898081"},{"key":"ref203","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC62300.2024.10737721"},{"key":"ref204","doi-asserted-by":"publisher","DOI":"10.2991\/icmeis-15.2015.120"},{"key":"ref205","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD61181.2024.10745410"},{"key":"ref206","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2018.8474078"},{"key":"ref207","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2023.155112"},{"key":"ref208","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2017.8053129"},{"key":"ref209","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2024.3425226"},{"key":"ref210","doi-asserted-by":"publisher","DOI":"10.1109\/ICIN53892.2022.9758095"},{"key":"ref211","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS58634.2023.10382808"},{"key":"ref212","doi-asserted-by":"publisher","DOI":"10.1109\/MCSoC64144.2024.00066"},{"key":"ref213","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD58807.2023.10299874"},{"key":"ref214","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2025.3529805"},{"key":"ref215","article-title":"LaMAGIC: Language-model-based topology generation for analog integrated circuits","author":"Chang","year":"2024","journal-title":"arXiv:2407.18269"},{"key":"ref216","doi-asserted-by":"publisher","DOI":"10.1109\/NewCAS64648.2025.11107079"},{"key":"ref217","doi-asserted-by":"publisher","DOI":"10.1109\/ISEDA65950.2025.11100397"},{"key":"ref218","doi-asserted-by":"publisher","DOI":"10.1109\/VTS65138.2025.11022936"},{"key":"ref219","doi-asserted-by":"publisher","DOI":"10.1109\/Austrochip.2014.6946310"},{"key":"ref220","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC56010.2022.9908139"},{"key":"ref221","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546835"},{"key":"ref222","doi-asserted-by":"publisher","DOI":"10.1109\/43.945301"},{"key":"ref223","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337301"},{"key":"ref224","doi-asserted-by":"publisher","DOI":"10.1109\/43.44506"},{"key":"ref225","doi-asserted-by":"publisher","DOI":"10.1145\/3505170.3511044"},{"key":"ref226","doi-asserted-by":"publisher","DOI":"10.1109\/ICM.2005.1590046"},{"key":"ref227","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT62049.2024.10830994"},{"key":"ref228","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD58065.2023.10192148"},{"key":"ref229","article-title":"CIRCUIT: A benchmark for circuit interpretation and reasoning capabilities of LLMs","author":"Skelic","year":"2025","journal-title":"arXiv:2502.07980"},{"key":"ref230","article-title":"AICircuit: A multi-level dataset and benchmark for AI-driven analog integrated circuit design","author":"Mehradfar","year":"2024","journal-title":"arXiv:2407.18272"},{"key":"ref231","article-title":"Supervised learning for analog and RF circuit design: Benchmarks and comparative insights","author":"Mehradfar","year":"2025","journal-title":"arXiv:2501.11839"},{"key":"ref232","article-title":"FALCON: An ML framework for fully automated layout-constrained analog circuit design","author":"Mehradfar","year":"2025","journal-title":"arXiv:2505.21923"},{"key":"ref233","article-title":"TensorFlow: A system for large-scale machine learning","author":"Abadi","year":"2016","journal-title":"arXiv:1605.08695"},{"key":"ref234","article-title":"PyTorch: An imperative style, high-performance deep learning library","author":"Paszke","year":"2019","journal-title":"arXiv:1912.01703"},{"key":"ref235","doi-asserted-by":"publisher","DOI":"10.1109\/CAI59869.2024.00179"},{"key":"ref236","volume-title":"EU AI Act: First Regulation on Artificial Intelligence","year":"2025"},{"key":"ref237","doi-asserted-by":"publisher","DOI":"10.1145\/3593013.3594069"},{"key":"ref238","article-title":"Model-agnostic meta-learning for fast adaptation of deep networks","author":"Finn","year":"2017","journal-title":"arXiv:1703.03400"},{"key":"ref239","doi-asserted-by":"publisher","DOI":"10.1016\/j.dsm.2024.08.004"},{"key":"ref240","article-title":"Evolutionary optimization of physics-informed neural networks: Evo-PINN frontiers and opportunities","author":"Wong","year":"2025","journal-title":"arXiv:2501.06572"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/10820123\/11153923.pdf?arnumber=11153923","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,5]],"date-time":"2025-11-05T18:41:42Z","timestamp":1762368102000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11153923\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025]]},"references-count":240,"URL":"https:\/\/doi.org\/10.1109\/access.2025.3607865","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025]]}}}