{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T05:51:06Z","timestamp":1781761866406,"version":"3.54.5"},"reference-count":219,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"name":"Research Council of Finland\u2019s Robust6G Project","award":["318927"],"award-info":[{"award-number":["318927"]}]},{"name":"Electric Vehicles Point Location Optimisation via Vehicular Communications (EVOLVE) Project through European Union\u2019s Horizon Research and Innovation Program","award":["101086218"],"award-info":[{"award-number":["101086218"]}]},{"name":"Economical and Ecological Radio Frequency Ecosystem (RFECO3) Project of Business Finland"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2026]]},"DOI":"10.1109\/access.2026.3700058","type":"journal-article","created":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T19:43:18Z","timestamp":1780515798000},"page":"88851-88878","source":"Crossref","is-referenced-by-count":0,"title":["Computation and Complexity-Aware DNN Accelerators: Architectures, Dataflows, and Design Trade-Offs"],"prefix":"10.1109","volume":"14","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-2759-0820","authenticated-orcid":false,"given":"Sudheer","family":"Vishwakarma","sequence":"first","affiliation":[{"name":"Faculty of Information Technology and Electrical Engineering, University of Oulu, Oulu, Finland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2951-5684","authenticated-orcid":false,"given":"Zaheer","family":"Khan","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology and Electrical Engineering, University of Oulu, Oulu, Finland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5081-1843","authenticated-orcid":false,"given":"Janne J.","family":"Lehtom\u00e4ki","sequence":"additional","affiliation":[{"name":"Faculty of Information Technology and Electrical Engineering, University of Oulu, Oulu, Finland"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCRD54409.2022.9730377"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IMCEC.2016.7867471"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2890150"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.3390\/s24154830"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.2889402"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3638242"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3253045"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TSUSC.2024.3353176"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2021.3055240"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2022.3211665"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2019.2938900"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2950386"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.917757"},{"key":"ref14","article-title":"RAPIDNN: In-memory deep neural network acceleration framework","author":"Imani","year":"2018","journal-title":"arXiv:1806.05794"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927280"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2026.3664183"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/s42979-024-02851-z"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2936192"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3233300"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2022.104441"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2815603"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3380548"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/tpds.2023.3324934"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2757036"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3095283"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021738"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2897701"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.435"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3533251"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3151916"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3632956"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2025.3558140"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3527156"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-45878-1_31"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2022.06.111"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247855"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TAI.2023.3311776"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/3289185"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3050670"},{"issue":"3","key":"ref40","doi-asserted-by":"crossref","first-page":"264","DOI":"10.1016\/j.eng.2020.01.007","article-title":"A survey of accelerator architectures for deep neural networks","volume":"6","author":"Chen","year":"2020","journal-title":"Engineering"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED58423.2023.10244311"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715272"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2017.7995253"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2785257"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689060"},{"key":"ref47","volume-title":"AI Engine Array Hierarchy","year":"2018"},{"key":"ref48","volume-title":"AI Engine Tile Architecture","year":"2018"},{"key":"ref49","volume-title":"AI Engine Array Interface Architecture","year":"2018"},{"key":"ref50","first-page":"578","article-title":"TVM: An automated end-to-end optimizing compiler for deep learning","volume-title":"Proc. 13th USENIX Conf. Operating Syst. Design Implement.","author":"Chen"},{"key":"ref51","volume-title":"UltraScale Architecture DSP Slice User Guide","year":"2021"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM48280.2020.00013"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1145\/3289602.3293913"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3090196"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1145\/3506713"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1145\/3193025.3193041"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589059"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1145\/3617836"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2761740"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00010"},{"key":"ref61","article-title":"AI accelerators for large language model inference: Architecture analysis and scaling strategies","author":"Sharma","year":"2025","journal-title":"arXiv:2506.00008"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00081"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2025.3574630"},{"key":"ref64","volume-title":"System Architecture-cloud TPU","year":"2022"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1109\/tdsc.2020.3007633"},{"key":"ref66","volume-title":"Ceva-NeuPro M: NPU IP Family for Generative and Classic AI With Highest Power Efficiency, Scalable and Future Proof","year":"2026"},{"key":"ref67","volume-title":"Combining Neural Network Processors and DSPs To Achieve the Best AI Performance","author":"Cooper","year":"2023"},{"key":"ref68","volume-title":"NPU IP Design Driven By Software Insights and Use Cases","year":"2026"},{"key":"ref69","volume-title":"Synopsys ARC NPX6FS NPU IP Family","year":"2026"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2007.09.006"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1038\/s42256-022-00463-x"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2021.3113475"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2024.105101"},{"key":"ref74","volume-title":"Systems Architecture-OCR: The Architecture of the Central Processing Unit (CPU)","year":"2026"},{"key":"ref75","volume-title":"Systems Performance: Enterprise Cloud","author":"Gregg","year":"2013"},{"key":"ref76","volume-title":"NVIDIA GRID: Graphics Accelerated VDI With the Visual Performance of a Workstation","author":"Herrera","year":"2014"},{"key":"ref77","volume-title":"AMD MxGPU and VMware Deployment Guide","year":"2020"},{"key":"ref78","first-page":"121","article-title":"A full GPU virtualization solution with mediated pass-through","volume-title":"Proc. USENIX Conf. USENIX Annu. Tech. Conf.","author":"Tian"},{"key":"ref79","article-title":"Modern computing: Vision and challenges","volume-title":"Telematics Informat. Rep.","volume":"13","author":"Gill","year":"2024"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1145\/3444692"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1007\/s10586-020-03090-6"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1145\/3686081.3686118"},{"key":"ref83","article-title":"FoldedHexaTorus: An inter-chiplet interconnect topology for chiplet-based systems using organic and glass substrates","author":"Iff","year":"2025","journal-title":"arXiv:2504.19878"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3214170"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI49217.2020.00063"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1007\/s10586-010-0151-6"},{"key":"ref87","volume-title":"Role of CPU and GPU in Training AI Models","author":"Thakral","year":"2023"},{"key":"ref88","doi-asserted-by":"publisher","DOI":"10.1109\/ICECET52533.2021.9698764"},{"key":"ref89","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3039278"},{"key":"ref90","volume-title":"What is a Neural Processing Unit (NPU)","author":"Schneider","year":"2026"},{"key":"ref91","doi-asserted-by":"publisher","DOI":"10.1145\/3620666.3651324"},{"key":"ref92","volume-title":"What is an AI Accelerator? IBM Think","year":"2026"},{"key":"ref93","volume-title":"CUDA Programming Guide (v13.2)","year":"2024"},{"key":"ref94","volume-title":"What\u2019s the Difference Between AI Accelerators and GPUs?","author":"Schneider","year":"2026"},{"key":"ref95","volume-title":"CPU Vs. GPU: Powerful Options for Your Computing Needs","year":"2026"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1109\/MCSoC51149.2021.00053"},{"key":"ref97","volume-title":"Hardware Acceleration: CPU, GPU or FPGA?","author":"Leon-Vega","year":"2024"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT52863.2021.9609837"},{"key":"ref99","article-title":"Benchmarking TPU, GPU, and CPU platforms for deep learning","author":"Emma Wang","year":"2019","journal-title":"arXiv:1907.10701"},{"key":"ref100","doi-asserted-by":"publisher","DOI":"10.3390\/app112211078"},{"key":"ref101","volume-title":"CPU Hardware Architecture and Performance Optimization","author":"Amadio","year":"2024"},{"key":"ref102","volume-title":"Machine Learning on Manycore CPUs","author":"Wszola","year":"2022"},{"key":"ref103","volume-title":"CPUs Vs. GPUs For Larger Machine Learning Datasets","year":"2024"},{"key":"ref104","doi-asserted-by":"publisher","DOI":"10.1145\/3301278"},{"key":"ref105","doi-asserted-by":"publisher","DOI":"10.1109\/ICACCS48705.2020.9074444"},{"key":"ref106","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2988311"},{"key":"ref107","doi-asserted-by":"publisher","DOI":"10.1145\/3284357"},{"key":"ref108","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3093398"},{"key":"ref109","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-023-34600-2"},{"key":"ref110","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.032271057"},{"key":"ref111","doi-asserted-by":"publisher","DOI":"10.3390\/fi11040100"},{"key":"ref112","doi-asserted-by":"crossref","DOI":"10.1016\/j.micpro.2023.105005","article-title":"Deep neural networks accelerators with focus on tensor processors","volume":"105","author":"Bolhasani","year":"2024","journal-title":"Microprocessors Microsystems"},{"key":"ref113","doi-asserted-by":"publisher","DOI":"10.1109\/CAS62834.2024.10736842"},{"key":"ref114","doi-asserted-by":"publisher","DOI":"10.1145\/3705003"},{"key":"ref115","volume-title":"TPU Architecture, Google Cloud Documentation","year":"2023"},{"key":"ref116","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589350"},{"key":"ref117","volume-title":"Tensor Processor Unit (TPU)","author":"Iliakopoulou","year":"2022"},{"key":"ref118","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-56950-0_47"},{"key":"ref119","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2022.3206262"},{"key":"ref120","article-title":"Proposal for a high precision tensor processing unit","author":"Olsen","year":"2017","journal-title":"arXiv:1706.03251"},{"key":"ref121","volume-title":"Tensor Processing Units (TPU): A Technical Analysis and Their Impact on Artificial Intelligence","author":"Armoni","year":"2024"},{"key":"ref122","doi-asserted-by":"publisher","DOI":"10.1109\/hpec43674.2020.9286149"},{"key":"ref123","doi-asserted-by":"publisher","DOI":"10.1145\/2654822.2541967"},{"key":"ref124","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref125","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783723"},{"key":"ref126","doi-asserted-by":"publisher","DOI":"10.1109\/ICASID.2018.8693202"},{"key":"ref127","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173176"},{"key":"ref128","doi-asserted-by":"publisher","DOI":"10.1145\/3289602.3293898"},{"key":"ref129","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00015"},{"key":"ref130","doi-asserted-by":"publisher","DOI":"10.1109\/dac18074.2021.9586216"},{"key":"ref131","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref132","doi-asserted-by":"publisher","DOI":"10.1038\/s41565-020-0655-z"},{"key":"ref133","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001163"},{"key":"ref134","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.112130359"},{"key":"ref135","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2444094"},{"key":"ref136","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2022.3227608"},{"key":"ref137","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM51124.2021.00026"},{"key":"ref138","doi-asserted-by":"publisher","DOI":"10.1145\/3808699"},{"key":"ref139","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2026.3685017"},{"key":"ref140","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3196055"},{"key":"ref141","article-title":"A survey on FPGA-based accelerator for ML models","author":"Yan","year":"2024","journal-title":"arXiv:2412.15666"},{"key":"ref142","doi-asserted-by":"publisher","DOI":"10.1145\/3617688"},{"key":"ref143","doi-asserted-by":"publisher","DOI":"10.1145\/3665898"},{"key":"ref144","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2705069"},{"key":"ref145","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2017.54"},{"key":"ref146","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474215"},{"key":"ref147","doi-asserted-by":"publisher","DOI":"10.1145\/3711683"},{"key":"ref148","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2535398"},{"key":"ref149","doi-asserted-by":"publisher","DOI":"10.1145\/3624476"},{"key":"ref150","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2023.3346944"},{"key":"ref151","doi-asserted-by":"publisher","DOI":"10.1145\/3721293"},{"key":"ref152","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-01249-6_18"},{"key":"ref153","doi-asserted-by":"publisher","DOI":"10.1145\/3616855.3635808"},{"key":"ref154","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-024-51258-6"},{"key":"ref155","article-title":"Layer-aware TDNN: Speaker recognition using multi-layer features from pre-trained models","author":"Sob Kim","year":"2024","journal-title":"arXiv:2409.07770"},{"key":"ref156","article-title":"Pooling methods in deep neural networks, a review","author":"Gholamalinezhad","year":"2020","journal-title":"arXiv:2009.07485"},{"key":"ref157","doi-asserted-by":"publisher","DOI":"10.1109\/ICRC.2016.7738674"},{"key":"ref158","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3310916"},{"key":"ref159","doi-asserted-by":"publisher","DOI":"10.1007\/s10489-024-05747-w"},{"key":"ref160","doi-asserted-by":"publisher","DOI":"10.1109\/JSTSP.2020.2969554"},{"key":"ref161","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2021.3111723"},{"key":"ref162","article-title":"A survey on deep neural network compression: Challenges, overview, and solutions","author":"Mishra","year":"2020","journal-title":"arXiv:2010.03954"},{"key":"ref163","doi-asserted-by":"publisher","DOI":"10.1145\/2637166.2637229"},{"key":"ref164","doi-asserted-by":"publisher","DOI":"10.1145\/3433547"},{"key":"ref165","doi-asserted-by":"publisher","DOI":"10.1145\/3529318"},{"key":"ref166","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2024.3475589"},{"key":"ref167","article-title":"FPGA-based acceleration for convolutional neural networks: A comprehensive review","author":"Jiang","year":"2025","journal-title":"arXiv:2505.13461"},{"key":"ref168","article-title":"A white paper on neural network quantization","author":"Nagel","year":"2021","journal-title":"arXiv:2106.08295"},{"key":"ref169","first-page":"35532","article-title":"AMQ: Enabling AutoML for mixed-precision weight-only quantization of large language models","volume-title":"Proc. Conf. Empirical Methods Natural Lang. Process.","author":"Lee"},{"key":"ref170","doi-asserted-by":"publisher","DOI":"10.1145\/3490422.3502364"},{"key":"ref171","article-title":"Binarized neural networks: Training deep neural networks with weights and activations constrained to +1 or -1","author":"Courbariaux","year":"2016","journal-title":"arXiv:1602.02830"},{"key":"ref172","first-page":"451","article-title":"Training DNNs with hybrid block floating point","volume-title":"Proc. 32nd Int. Conf. Neural Inf. Process. Syst.","volume":"31","author":"Drumond"},{"key":"ref173","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-19983-7_9"},{"key":"ref174","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00086"},{"key":"ref175","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2017.25"},{"key":"ref176","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2016.7577308"},{"key":"ref177","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062244"},{"key":"ref178","article-title":"A survey of quantization methods for efficient neural network inference","author":"Gholami","year":"2021","journal-title":"arXiv:2103.13630"},{"key":"ref179","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174261"},{"key":"ref180","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174253"},{"key":"ref181","doi-asserted-by":"publisher","DOI":"10.1016\/j.neunet.2018.01.010"},{"key":"ref182","doi-asserted-by":"publisher","DOI":"10.1145\/3289602.3293990"},{"key":"ref183","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2020.3013637"},{"key":"ref184","article-title":"Quantizing convolutional neural networks for low-power high-throughput inference engines","author":"Settle","year":"2018","journal-title":"arXiv:1805.07941"},{"key":"ref185","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-20083-0_23"},{"key":"ref186","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2020.2983662"},{"key":"ref187","first-page":"3123","article-title":"BinaryConnect: Training deep neural networks with binary weights during propagations","volume-title":"Proc. 29th Int. Conf. Neural Inf. Process. Syst.","volume":"2","author":"Courbariaux"},{"key":"ref188","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2019.01170"},{"key":"ref189","first-page":"344","article-title":"Towards accurate binary convolutional neural network","volume-title":"Proc. 31st Int. Conf. Neural Inf. Process. Syst.","author":"Lin"},{"key":"ref190","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056820"},{"key":"ref191","doi-asserted-by":"publisher","DOI":"10.1109\/ICPS59941.2024.10640013"},{"key":"ref192","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3078541"},{"key":"ref193","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2022.3179016"},{"key":"ref194","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3300657"},{"key":"ref195","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218684"},{"key":"ref196","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2019.8682791"},{"key":"ref197","doi-asserted-by":"publisher","DOI":"10.1007\/s10994-021-06053-z"},{"key":"ref198","first-page":"7197","article-title":"Up or down? Adaptive rounding for post-training quantization","volume-title":"Proc. 37th Int. Conf. Mach. Learn.","volume":"1","author":"Nagel"},{"key":"ref199","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA51647.2021.00027"},{"key":"ref200","doi-asserted-by":"publisher","DOI":"10.1145\/3474597"},{"key":"ref201","doi-asserted-by":"publisher","DOI":"10.3390\/electronics10182272"},{"key":"ref202","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2019.00034"},{"key":"ref203","doi-asserted-by":"publisher","DOI":"10.1145\/3535355"},{"key":"ref204","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2019.00063"},{"key":"ref205","doi-asserted-by":"publisher","DOI":"10.1145\/3524059.3532394"},{"key":"ref206","doi-asserted-by":"publisher","DOI":"10.1145\/3313231.3352376"},{"key":"ref207","doi-asserted-by":"publisher","DOI":"10.1145\/3735950.3735956"},{"key":"ref208","doi-asserted-by":"publisher","DOI":"10.3390\/electronics10010094"},{"key":"ref209","doi-asserted-by":"publisher","DOI":"10.1145\/3729169"},{"key":"ref210","doi-asserted-by":"publisher","DOI":"10.3390\/electronics13081431"},{"key":"ref211","doi-asserted-by":"publisher","DOI":"10.1145\/3579170.3579263"},{"key":"ref212","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2022.3178730"},{"key":"ref213","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3300376"},{"key":"ref214","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2020.3022920"},{"key":"ref215","doi-asserted-by":"publisher","DOI":"10.1145\/3701996"},{"key":"ref216","doi-asserted-by":"publisher","DOI":"10.1109\/iscas56072.2025.11043563"},{"key":"ref217","first-page":"1","article-title":"MapFormer: Attention-based multi-DNN manager for throughout & power co-optimization on embedded devices","volume-title":"Proc. 43rd IEEE\/ACM Int. Conf. Comput.-Aided Design","author":"Karatzas"},{"key":"ref218","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3393428"},{"key":"ref219","doi-asserted-by":"publisher","DOI":"10.1145\/3613424.3623786"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6287639\/11323511\/11550109.pdf?arnumber=11550109","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T04:51:00Z","timestamp":1781758260000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11550109\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026]]},"references-count":219,"URL":"https:\/\/doi.org\/10.1109\/access.2026.3700058","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026]]}}}