{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,12]],"date-time":"2025-06-12T17:42:34Z","timestamp":1749750154273,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,9,15]],"date-time":"2021-09-15T00:00:00Z","timestamp":1631664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,9,15]],"date-time":"2021-09-15T00:00:00Z","timestamp":1631664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,9,15]]},"DOI":"10.1109\/acit52158.2021.9548512","type":"proceedings-article","created":{"date-parts":[[2021,10,1]],"date-time":"2021-10-01T23:29:27Z","timestamp":1633130967000},"page":"682-685","source":"Crossref","is-referenced-by-count":3,"title":["Microelectronic Structures of Arithmetic Logic Unit Components"],"prefix":"10.1109","author":[{"given":"Yaroslav","family":"Nykolaychuk","sequence":"first","affiliation":[{"name":"Nadvirna Vocational College of the National Transport University,Nadvirna,Ukraine"}]},{"given":"Natalia","family":"Vozna","sequence":"additional","affiliation":[{"name":"West Ukrainian National Univerity,Deparlament of Specialized Computer Systems,Ternopil,Ukraine"}]},{"given":"Alina","family":"Davletova","sequence":"additional","affiliation":[{"name":"West Ukrainian National Univerity,Deparlament of Specialized Computer Systems,Ternopil,Ukraine"}]},{"given":"Ihor","family":"Pitukh","sequence":"additional","affiliation":[{"name":"West Ukrainian National Univerity,Deparlament of Specialized Computer Systems,Ternopil,Ukraine"}]},{"given":"Oleg","family":"Zastavnyy","sequence":"additional","affiliation":[{"name":"West Ukrainian National Univerity,Deparlament of Specialized Computer Systems,Ternopil,Ukraine"}]},{"given":"Volodymyr","family":"Hryha","sequence":"additional","affiliation":[{"name":"V. Stefanyk Precarpathian National University,Department of Computer Engineering and Electronics,Ivano-Frankivsk,Ukraine"}]}],"member":"263","reference":[{"journal-title":"Patent","article-title":"Declarative Patent of Ukraine for Utility Model","year":"2017","key":"ref10"},{"key":"ref11","first-page":"378","author":"vozna","year":"2018","journal-title":"Structuring of multifunctional data theory methods and tools Monograph"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1016\/0304-3975(95)00116-6"},{"key":"ref13","first-page":"27","article-title":"Estimation of structural complexity of multi-section multipliers of Galois field elements","author":"glukhov","year":"2014","journal-title":"The Bulletin of the National University “Lviv Polytechnic” Computer systems and networks"},{"journal-title":"Patent","article-title":"Declarative Patent of Ukraine for Utility Model","year":"2019","key":"ref14"},{"key":"ref15","first-page":"664","author":"anand kumar","year":"2007","journal-title":"Fundamentals of Digital Circuits"},{"journal-title":"Patent","article-title":"Declarative Patent of Ukraine","year":"2018","key":"ref16"},{"journal-title":"Patent","article-title":"Declarative Patent of Ukraine","year":"2017","key":"ref17"},{"key":"ref4","first-page":"519","author":"holdsworth","year":"2003","journal-title":"Digital Logic Design \/ Newnes"},{"journal-title":"Ian Sinclair Electronics Simplified Book","first-page":"368","year":"2011","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACIT49673.2020.9208987"},{"key":"ref5","first-page":"470","author":"melnyk","year":"2008","journal-title":"Computer Architecture"},{"key":"ref8","first-page":"35","article-title":"Methods of improving the structures of high-speed one-bit and multi-bit binary adders","volume":"1","author":"nykolaychuk","year":"2019","journal-title":"The Bulletin of the National University “Lviv Polytechnic” Computer systems and networks"},{"key":"ref7","first-page":"600","author":"reinders","year":"2014","journal-title":"High Performance Parallelism Pearls Volume One Multicore and Many-core Programming Approaches"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.23939\/acps2019.02.110"},{"key":"ref1","first-page":"1","article-title":"Cyber-physical systems multilayer platform and research framework. Advances in cyber-physical systems","volume":"1","author":"melnyk","year":"2016","journal-title":"Lviv Polytechnic National University Publishing"},{"key":"ref9","first-page":"84","article-title":"Theory and system characteristics of elementary components and adders of problem-oriented special-purpose processors","volume":"29","author":"krulikovskyi","year":"2015","journal-title":"International scientific and technical journal “Optical-electronic information and energy technologies”"}],"event":{"name":"2021 11th International Conference on Advanced Computer Information Technologies (ACIT)","start":{"date-parts":[[2021,9,15]]},"location":"Deggendorf, Germany","end":{"date-parts":[[2021,9,17]]}},"container-title":["2021 11th International Conference on Advanced Computer Information Technologies (ACIT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9548321\/9548113\/09548512.pdf?arnumber=9548512","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,2]],"date-time":"2022-08-02T19:21:18Z","timestamp":1659468078000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9548512\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,9,15]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/acit52158.2021.9548512","relation":{},"subject":[],"published":{"date-parts":[[2021,9,15]]}}}