{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,21]],"date-time":"2026-01-21T04:09:26Z","timestamp":1768968566323,"version":"3.49.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,10]]},"DOI":"10.1109\/acssc.2017.8335444","type":"proceedings-article","created":{"date-parts":[[2018,4,18]],"date-time":"2018-04-18T22:21:42Z","timestamp":1524090102000},"page":"745-749","source":"Crossref","is-referenced-by-count":3,"title":["The future of computing \u2014 Arithmetic circuits implemented with memristors"],"prefix":"10.1109","author":[{"given":"Nagaraja","family":"Revanna","sequence":"first","affiliation":[]},{"given":"Lauren","family":"Guckert","sequence":"additional","affiliation":[]},{"given":"Earl E.","family":"Swartzlander","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2215714"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2010.5757715"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2016.7869016"},{"key":"ref6","first-page":"1","article-title":"MRL ? Memristor Ratioed Logic","author":"kvatinsky","year":"2012","journal-title":"12th Intl Workshop on Cellular Nanoscale Networks and their Applications (CNNA)"},{"key":"ref11","article-title":"Memristor Based High Fanout Logic Gates","author":"revanna","year":"2016","journal-title":"IEEE Dallas Circuits and Systems Conference"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2282132"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2016.7869644"},{"key":"ref7","first-page":"1","article-title":"Hybrid Memristor-CMOS (MeMOS) based Logic Gates and Adder Circuits","author":"singh","year":"2015","journal-title":"CoRR"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"873","DOI":"10.1038\/nature08940","article-title":"Memristive&#x2019; Switches Enable &#x2018;Stateful&#x2019; Logic Operations via Material Implication","volume":"464","author":"borghetti","year":"2010","journal-title":"Nature"},{"key":"ref9","first-page":"1","article-title":"MAD Gates - Memristor Logic Design Using Driver Circuitry","volume":"99","author":"guckert","year":"2016","journal-title":"IEEE Transactions on Circuits and Systems II Express Briefs"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"}],"event":{"name":"2017 51st Asilomar Conference on Signals, Systems, and Computers","location":"Pacific Grove, CA","start":{"date-parts":[[2017,10,29]]},"end":{"date-parts":[[2017,11,1]]}},"container-title":["2017 51st Asilomar Conference on Signals, Systems, and Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8330843\/8335116\/08335444.pdf?arnumber=8335444","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T05:59:36Z","timestamp":1643176776000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8335444\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,10]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/acssc.2017.8335444","relation":{},"subject":[],"published":{"date-parts":[[2017,10]]}}}