{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T15:22:44Z","timestamp":1761578564591,"version":"3.28.0"},"reference-count":51,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,6]]},"DOI":"10.1109\/ahs.2012.6268667","type":"proceedings-article","created":{"date-parts":[[2012,8,22]],"date-time":"2012-08-22T10:49:08Z","timestamp":1345632548000},"page":"38-45","source":"Crossref","is-referenced-by-count":4,"title":["OTERA: Online test strategies for reliable reconfigurable architectures &amp;#x2014; Invited paper for the AHS-2012 special session &amp;#x201C;Dependability by reconfigurable hardware&amp;#x201D;"],"prefix":"10.1109","author":[{"given":"Lars","family":"Bauer","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Claus","family":"Braun","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael E.","family":"Imhof","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael A.","family":"Kochte","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hongyan","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hans-Joachim","family":"Wunderlich","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jorg","family":"Henkel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"35","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1996.510883"},{"key":"36","article-title":"Testing FPGA devices using JBits","author":"sundararajan","year":"0","journal-title":"Military and Aerospace Applications of Programmable Devices and Techn 2001"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1973.223651"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.1997.643967"},{"key":"39","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852452"},{"key":"37","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743180"},{"key":"38","first-page":"795","article-title":"Novel technique for built-in self-test of FPGA interconnects","author":"sun","year":"0","journal-title":"International Test Conference 2000"},{"key":"43","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2009.51"},{"key":"42","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.891102"},{"key":"41","first-page":"87","article-title":"Embedded processor based built-in self-test and diagnosis of logic and memory resources in FPGAs","author":"milton","year":"0","journal-title":"Int'l Conf on Embedded Systems and Applications (ESA) 2006"},{"key":"40","first-page":"498","article-title":"Efficient on-line testing of FPGAs with provable diagnosabilities","author":"verma","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"22","first-page":"1","article-title":"FPGAs with self-repair capabilities","author":"durand","year":"0","journal-title":"ACM Int'l Workshop on FPGAs 1994"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2008.4629973"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2000.903403"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2004.18"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.43"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884053"},{"key":"28","article-title":"Ch. 12.4 field programmable gate array testing","author":"stroud","year":"2006","journal-title":"VLSI Test Principles and Architectures"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/54.199799"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1155\/ES\/2006\/56320"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.110"},{"year":"0","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.134"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/43.663825"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146959"},{"key":"5","article-title":"Variation and aging tolerance in FPGAs","author":"metha","year":"2011","journal-title":"Low-Power Variation-Tolerant Design in Nanometer Silicon"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/54.655182"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5653636"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1109\/92.678888"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1596532.1596540"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-6505-7"},{"key":"19","article-title":"NSEU mitigation in avionics applications","author":"hu","year":"2010","journal-title":"Xilinx Application Note XAPP1073"},{"journal-title":"Self-Checking and Fault-Tolerant Digital Design","year":"2001","author":"lala","key":"17"},{"journal-title":"Fault-Tolerance Techniques for SRAM-based FPGAs","year":"2006","author":"kastensmidt","key":"18"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743180"},{"key":"16","first-page":"1239","article-title":"FPGA interconnect delay fault testing","author":"chmelar","year":"0","journal-title":"IEEE Int'l Test Conference 2003"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2009.5272313"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.2"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2011.5963920"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/360276.360328"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2007.22"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.78"},{"key":"49","doi-asserted-by":"crossref","first-page":"315","DOI":"10.1023\/A:1008389920806","article-title":"Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools","volume":"13","author":"psarakis","year":"1998","journal-title":"Journal of Electronic Testing (JETTA)"},{"key":"48","doi-asserted-by":"publisher","DOI":"10.1109\/FOCS.1967.33"},{"key":"45","first-page":"973","article-title":"Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications","author":"abramovici","year":"0","journal-title":"Int'l Test Conference 1999"},{"key":"44","doi-asserted-by":"crossref","first-page":"1284","DOI":"10.1109\/TVLSI.2004.837989","article-title":"Online BIST and BIST-Based Diagnosis of FPGA Logic Blocks","volume":"12","author":"abramovici","year":"2004","journal-title":"IEEE Trans VLSI Systems"},{"key":"47","doi-asserted-by":"publisher","DOI":"10.1109\/SBCCI.1998.715412"},{"key":"46","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2012.6313838"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.104"},{"key":"51","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2011.5981545"},{"key":"50","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1995.529889"}],"event":{"name":"2012 NASA\/ESA Conference on Adaptive Hardware and Systems (AHS)","start":{"date-parts":[[2012,6,25]]},"location":"Erlangen, Germany","end":{"date-parts":[[2012,6,28]]}},"container-title":["2012 NASA\/ESA Conference on Adaptive Hardware and Systems (AHS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6264152\/6268630\/06268667.pdf?arnumber=6268667","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T19:09:17Z","timestamp":1497985757000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6268667\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,6]]},"references-count":51,"URL":"https:\/\/doi.org\/10.1109\/ahs.2012.6268667","relation":{},"subject":[],"published":{"date-parts":[[2012,6]]}}}