{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,24]],"date-time":"2025-05-24T04:12:19Z","timestamp":1748059939005,"version":"3.41.0"},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.1109\/aicas.2019.8771603","type":"proceedings-article","created":{"date-parts":[[2019,7,25]],"date-time":"2019-07-25T23:57:53Z","timestamp":1564099073000},"page":"127-131","source":"Crossref","is-referenced-by-count":8,"title":["Function-Safe Vehicular AI Processor with Nano Core-In-Memory Architecture"],"prefix":"10.1109","author":[{"given":"Youngsu","family":"Kwon","sequence":"first","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Jeongmin","family":"Yang","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Yongcheol Peter","family":"Cho","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Kyoung-Seon","family":"Shin","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Jaehoon","family":"Chung","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Jinho","family":"Han","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Chun-Gi","family":"Lyuh","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Hyun-Mi","family":"Kim","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Chan","family":"Kim","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]},{"given":"Min-Seok","family":"Choi","sequence":"additional","affiliation":[{"name":"AI Processor Research Group, Electronics and Telecommunications Research Institute, Daejeon, Republic of Korea"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2017.9"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080254"},{"key":"ref5","article-title":"An Overview of NVIDIA’s Autonomous Vehicles Platform","author":"gupta","year":"2017","journal-title":"HOTCHIPS"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2620997"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.91"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2574353"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.022071134"}],"event":{"name":"2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)","start":{"date-parts":[[2019,3,18]]},"location":"Hsinchu, Taiwan","end":{"date-parts":[[2019,3,20]]}},"container-title":["2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8766332\/8771465\/08771603.pdf?arnumber=8771603","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,23]],"date-time":"2025-05-23T17:03:29Z","timestamp":1748019809000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8771603\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/aicas.2019.8771603","relation":{},"subject":[],"published":{"date-parts":[[2019,3]]}}}