{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,13]],"date-time":"2026-01-13T21:21:12Z","timestamp":1768339272261,"version":"3.49.0"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,11]]},"DOI":"10.1109\/aicas57966.2023.10168596","type":"proceedings-article","created":{"date-parts":[[2023,7,7]],"date-time":"2023-07-07T18:24:30Z","timestamp":1688754270000},"page":"1-5","source":"Crossref","is-referenced-by-count":6,"title":["TRIO: a Novel 10T Ternary SRAM Cell for Area-Efficient In-memory Computing of Ternary Neural Networks"],"prefix":"10.1109","author":[{"given":"Thanh-Dat","family":"Nguyen","sequence":"first","affiliation":[{"name":"Kyung Hee University"}]},{"given":"Minh-Son","family":"Le","sequence":"additional","affiliation":[{"name":"Kyung Hee University"}]},{"given":"Thi-Nhan","family":"Pham","sequence":"additional","affiliation":[{"name":"Kyung Hee University"}]},{"given":"Ik-Joon","family":"Chang","sequence":"additional","affiliation":[{"name":"Kyung Hee University"}]}],"member":"263","reference":[{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287718"},{"key":"ref7","article-title":"PR-CIM: a Variation-Aware Binary-Neural-Network Framework for Process-Resilient Computation-in-memory","author":"le","year":"2021"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/j.neunet.2018.01.010"},{"key":"ref4","article-title":"Deeplearning","author":"lecun","year":"2015","journal-title":"Nature"},{"key":"ref3","article-title":"A Ternary Based Bit Scalable, 8.80 TOPS\/W CNN accelerator with Many-core Processing-in-memory Architecture with 896K synapses\/mm2","author":"makoto yabuuchi","year":"2019","journal-title":"Symposium on VLSI Technology"},{"key":"ref6","article-title":"Reducing Gradient Mismatch in Binary Activation Network by Coupling Binary Activation","author":"kim","year":"2020","journal-title":"International Conference on Learning Representations (ICLR)"},{"key":"ref5","article-title":"Binarized Neural Networks: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1","author":"courbariaux","year":"2016"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2952773"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.2993045"}],"event":{"name":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","location":"Hangzhou, China","start":{"date-parts":[[2023,6,11]]},"end":{"date-parts":[[2023,6,13]]}},"container-title":["2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10168547\/10168548\/10168596.pdf?arnumber=10168596","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,24]],"date-time":"2023-07-24T17:33:31Z","timestamp":1690220011000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10168596\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,11]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/aicas57966.2023.10168596","relation":{},"subject":[],"published":{"date-parts":[[2023,6,11]]}}}