{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:10:53Z","timestamp":1730196653392,"version":"3.28.0"},"reference-count":5,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/apccas.2002.1114976","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T21:03:42Z","timestamp":1056575022000},"page":"389-392","source":"Crossref","is-referenced-by-count":0,"title":["VHDL design and simulation of MAM memory for LAPCAM parallel architecture for image processing"],"prefix":"10.1109","volume":"1","author":[{"given":"I.","family":"Darmawan","sequence":"first","affiliation":[]},{"given":"W.T.","family":"Hartono","sequence":"additional","affiliation":[]},{"given":"E.","family":"Mozef","sequence":"additional","affiliation":[]},{"given":"S.","family":"Sutikno","sequence":"additional","affiliation":[]},{"family":"Kuspriyanto","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICPR.1996.547655"},{"key":"ref3","first-page":"585","article-title":"Design of linear array processors with Content-Addressable Memory for intermediate level vision","author":"mozef","year":"0","journal-title":"ISCA-IEEE 9th International Conference on Parallel and Distributed Computing Systems"},{"key":"ref5","first-page":"166","article-title":"LAPCAM, Linear Array of Processors using Content-Addressable Memories: A new design of machine vision for parallel image computations","author":"mozef","year":"0","journal-title":"Proc IAPR Int l Workshop Machine Vision Application"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/B978-044482587-2\/50152-X"},{"key":"ref1","article-title":"Conception et etude d'une architecture parallele a reseau lineaire de processeurs et mernoires CAM pour le traitement d'images","volume":"97","author":"mozef","year":"0"}],"event":{"name":"APCCAS. Asia-Pacific Conference on Circuits and Systems","acronym":"APCCAS-02","location":"Bali, Indonesia"},"container-title":["Asia-Pacific Conference on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8182\/24591\/01114976.pdf?arnumber=1114976","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T17:54:18Z","timestamp":1489427658000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1114976\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/apccas.2002.1114976","relation":{},"subject":[]}}